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[C++11] More 'nullptr' conversion. In some cases just using a boolean check instead of comparing to nullptr.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206254 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2014-04-15 07:20:03 +00:00
parent 9393eb354f
commit 095734c578
19 changed files with 93 additions and 93 deletions
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2
include/llvm/TableGen/Record.h
View File

@ -1486,7 +1486,7 @@ public:
}
void addValue(const RecordVal &RV) {
assert(getValue(RV.getNameInit()) == 0 && "Value already added!");
assert(getValue(RV.getNameInit()) == nullptr && "Value already added!");
Values.push_back(RV);
if (Values.size() > 1)
// Keep NAME at the end of the list. It makes record dumps a

12
utils/TableGen/AsmMatcherEmitter.cpp
View File

@ -306,8 +306,8 @@ struct MatchableInfo {
/// Register record if this token is singleton register.
Record *SingletonReg;
explicit AsmOperand(StringRef T) : Token(T), Class(0), SubOpIdx(-1),
SingletonReg(0) {}
explicit AsmOperand(StringRef T) : Token(T), Class(nullptr), SubOpIdx(-1),
SingletonReg(nullptr) {}
};
/// ResOperand - This represents a single operand in the result instruction
@ -666,7 +666,7 @@ public:
assert(Def->isSubClassOf("Predicate") && "Invalid predicate type!");
std::map<Record*, SubtargetFeatureInfo*, LessRecordByID>::const_iterator I =
SubtargetFeatures.find(Def);
return I == SubtargetFeatures.end() ? 0 : I->second;
return I == SubtargetFeatures.end() ? nullptr : I->second;
}
RecordKeeper &getRecords() const {
@ -1018,7 +1018,7 @@ AsmMatcherInfo::getOperandClass(Record *Rec, int SubOpIdx) {
// RegisterOperand may have an associated ParserMatchClass. If it does,
// use it, else just fall back to the underlying register class.
const RecordVal *R = Rec->getValue("ParserMatchClass");
if (R == 0 || R->getValue() == 0)
if (!R || !R->getValue())
PrintFatalError("Record `" + Rec->getName() +
"' does not have a ParserMatchClass!\n");
@ -1897,7 +1897,7 @@ static void emitConvertFuncs(CodeGenTarget &Target, StringRef ClassName,
}
case MatchableInfo::ResOperand::RegOperand: {
std::string Reg, Name;
if (OpInfo.Register == 0) {
if (!OpInfo.Register) {
Name = "reg0";
Reg = "0";
} else {
@ -2319,7 +2319,7 @@ static std::string GetAliasRequiredFeatures(Record *R,
for (unsigned i = 0, e = ReqFeatures.size(); i != e; ++i) {
SubtargetFeatureInfo *F = Info.getSubtargetFeature(ReqFeatures[i]);
if (F == 0)
if (!F)
PrintFatalError(R->getLoc(), "Predicate '" + ReqFeatures[i]->getName() +
"' is not marked as an AssemblerPredicate!");

8
utils/TableGen/AsmWriterEmitter.cpp
View File

@ -152,7 +152,7 @@ FindUniqueOperandCommands(std::vector<std::string> &UniqueOperandCommands,
for (unsigned i = 0, e = NumberedInstructions->size(); i != e; ++i) {
const AsmWriterInst *Inst = getAsmWriterInstByID(i);
if (Inst == 0)
if (!Inst)
continue; // PHI, INLINEASM, CFI_INSTRUCTION, etc.
std::string Command;
@ -301,7 +301,7 @@ void AsmWriterEmitter::EmitPrintInstruction(raw_ostream &O) {
// representation.
for (unsigned i = 0, e = NumberedInstructions->size(); i != e; ++i) {
AsmWriterInst *AWI = CGIAWIMap[NumberedInstructions->at(i)];
if (AWI != 0 &&
if (AWI &&
AWI->Operands[0].OperandType ==
AsmWriterOperand::isLiteralTextOperand &&
!AWI->Operands[0].Str.empty()) {
@ -317,7 +317,7 @@ void AsmWriterEmitter::EmitPrintInstruction(raw_ostream &O) {
for (unsigned i = 0, e = NumberedInstructions->size(); i != e; ++i) {
AsmWriterInst *AWI = CGIAWIMap[NumberedInstructions->at(i)];
unsigned Idx;
if (AWI == 0) {
if (!AWI) {
// Something not handled by the asmwriter printer.
Idx = ~0U;
} else if (AWI->Operands[0].OperandType !=
@ -846,7 +846,7 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
assert(Rec->isSubClassOf("Operand") && "Unexpected operand!");
// FIXME: We may need to handle these situations.
delete IAP;
IAP = 0;
IAP = nullptr;
CantHandle = true;
break;
}

38
utils/TableGen/CodeGenDAGPatterns.cpp
View File

@ -83,7 +83,7 @@ bool EEVT::TypeSet::FillWithPossibleTypes(TreePattern &TP,
return false;
for (unsigned i = 0, e = LegalTypes.size(); i != e; ++i)
if (Pred == 0 || Pred(LegalTypes[i]))
if (!Pred || Pred(LegalTypes[i]))
TypeVec.push_back(LegalTypes[i]);
// If we have nothing that matches the predicate, bail out.
@ -976,7 +976,7 @@ bool TreePatternNode::UpdateNodeTypeFromInst(unsigned ResNo,
// Both RegisterClass and RegisterOperand operands derive their types from a
// register class def.
Record *RC = 0;
Record *RC = nullptr;
if (Operand->isSubClassOf("RegisterClass"))
RC = Operand;
else if (Operand->isSubClassOf("RegisterOperand"))
@ -1094,7 +1094,7 @@ static unsigned GetNumNodeResults(Record *Operator, CodeGenDAGPatterns &CDP) {
// Get the result tree.
DagInit *Tree = Operator->getValueAsDag("Fragment");
Record *Op = 0;
Record *Op = nullptr;
if (Tree)
if (DefInit *DI = dyn_cast<DefInit>(Tree->getOperator()))
Op = DI->getDef();
@ -1256,7 +1256,7 @@ SubstituteFormalArguments(std::map<std::string, TreePatternNode*> &ArgMap) {
/// PatFrag references.
TreePatternNode *TreePatternNode::InlinePatternFragments(TreePattern &TP) {
if (TP.hasError())
return 0;
return nullptr;
if (isLeaf())
return this; // nothing to do.
@ -1285,7 +1285,7 @@ TreePatternNode *TreePatternNode::InlinePatternFragments(TreePattern &TP) {
if (Frag->getNumArgs() != Children.size()) {
TP.error("'" + Op->getName() + "' fragment requires " +
utostr(Frag->getNumArgs()) + " operands!");
return 0;
return nullptr;
}
TreePatternNode *FragTree = Frag->getOnlyTree()->clone();
@ -1435,7 +1435,7 @@ getIntrinsicInfo(const CodeGenDAGPatterns &CDP) const {
if (getOperator() != CDP.get_intrinsic_void_sdnode() &&
getOperator() != CDP.get_intrinsic_w_chain_sdnode() &&
getOperator() != CDP.get_intrinsic_wo_chain_sdnode())
return 0;
return nullptr;
unsigned IID = cast<IntInit>(getChild(0)->getLeafValue())->getValue();
return &CDP.getIntrinsicInfo(IID);
@ -1445,12 +1445,12 @@ getIntrinsicInfo(const CodeGenDAGPatterns &CDP) const {
/// return the ComplexPattern information, otherwise return null.
const ComplexPattern *
TreePatternNode::getComplexPatternInfo(const CodeGenDAGPatterns &CGP) const {
if (!isLeaf()) return 0;
if (!isLeaf()) return nullptr;
DefInit *DI = dyn_cast<DefInit>(getLeafValue());
if (DI && DI->getDef()->isSubClassOf("ComplexPattern"))
return &CGP.getComplexPattern(DI->getDef());
return 0;
return nullptr;
}
/// NodeHasProperty - Return true if this node has the specified property.
@ -1888,7 +1888,7 @@ TreePatternNode *TreePattern::ParseTreePattern(Init *TheInit, StringRef OpName){
if (BitsInit *BI = dyn_cast<BitsInit>(TheInit)) {
// Turn this into an IntInit.
Init *II = BI->convertInitializerTo(IntRecTy::get());
if (II == 0 || !isa<IntInit>(II))
if (!II || !isa<IntInit>(II))
error("Bits value must be constants!");
return ParseTreePattern(II, OpName);
}
@ -2739,7 +2739,7 @@ const DAGInstruction &CodeGenDAGPatterns::parseInstructionPattern(
// Check that all of the results occur first in the list.
std::vector<Record*> Results;
TreePatternNode *Res0Node = 0;
TreePatternNode *Res0Node = nullptr;
for (unsigned i = 0; i != NumResults; ++i) {
if (i == CGI.Operands.size())
I->error("'" + InstResults.begin()->first +
@ -2748,13 +2748,13 @@ const DAGInstruction &CodeGenDAGPatterns::parseInstructionPattern(
// Check that it exists in InstResults.
TreePatternNode *RNode = InstResults[OpName];
if (RNode == 0)
if (!RNode)
I->error("Operand $" + OpName + " does not exist in operand list!");
if (i == 0)
Res0Node = RNode;
Record *R = cast<DefInit>(RNode->getLeafValue())->getDef();
if (R == 0)
if (!R)
I->error("Operand $" + OpName + " should be a set destination: all "
"outputs must occur before inputs in operand list!");
@ -2811,7 +2811,7 @@ const DAGInstruction &CodeGenDAGPatterns::parseInstructionPattern(
// Promote the xform function to be an explicit node if set.
if (Record *Xform = OpNode->getTransformFn()) {
OpNode->setTransformFn(0);
OpNode->setTransformFn(nullptr);
std::vector<TreePatternNode*> Children;
Children.push_back(OpNode);
OpNode = new TreePatternNode(Xform, Children, OpNode->getNumTypes());
@ -2855,7 +2855,7 @@ void CodeGenDAGPatterns::ParseInstructions() {
std::vector<Record*> Instrs = Records.getAllDerivedDefinitions("Instruction");
for (unsigned i = 0, e = Instrs.size(); i != e; ++i) {
ListInit *LI = 0;
ListInit *LI = nullptr;
if (isa<ListInit>(Instrs[i]->getValueInit("Pattern")))
LI = Instrs[i]->getValueAsListInit("Pattern");
@ -2890,7 +2890,7 @@ void CodeGenDAGPatterns::ParseInstructions() {
// Create and insert the instruction.
std::vector<Record*> ImpResults;
Instructions.insert(std::make_pair(Instrs[i],
DAGInstruction(0, Results, Operands, ImpResults)));
DAGInstruction(nullptr, Results, Operands, ImpResults)));
continue; // no pattern.
}
@ -2907,7 +2907,7 @@ void CodeGenDAGPatterns::ParseInstructions() {
E = Instructions.end(); II != E; ++II) {
DAGInstruction &TheInst = II->second;
TreePattern *I = TheInst.getPattern();
if (I == 0) continue; // No pattern.
if (!I) continue; // No pattern.
// FIXME: Assume only the first tree is the pattern. The others are clobber
// nodes.
@ -2983,7 +2983,7 @@ void CodeGenDAGPatterns::AddPatternToMatch(TreePattern *Pattern,
// they don't exist in the input pattern.
for (std::map<std::string, NameRecord>::iterator
I = DstNames.begin(), E = DstNames.end(); I != E; ++I) {
if (SrcNames[I->first].first == 0)
if (SrcNames[I->first].first == nullptr)
Pattern->error("Pattern has input without matching name in output: $" +
I->first);
}
@ -2992,7 +2992,7 @@ void CodeGenDAGPatterns::AddPatternToMatch(TreePattern *Pattern,
// name isn't used in the dest, and isn't used to tie two values together.
for (std::map<std::string, NameRecord>::iterator
I = SrcNames.begin(), E = SrcNames.end(); I != E; ++I)
if (DstNames[I->first].first == 0 && SrcNames[I->first].second == 1)
if (DstNames[I->first].first == nullptr && SrcNames[I->first].second == 1)
Pattern->error("Pattern has dead named input: $" + I->first);
PatternsToMatch.push_back(PTM);
@ -3280,7 +3280,7 @@ void CodeGenDAGPatterns::ParsePatterns() {
for (unsigned ii = 0, ee = DstPattern->getNumChildren(); ii != ee; ++ii) {
TreePatternNode *OpNode = DstPattern->getChild(ii);
if (Record *Xform = OpNode->getTransformFn()) {
OpNode->setTransformFn(0);
OpNode->setTransformFn(nullptr);
std::vector<TreePatternNode*> Children;
Children.push_back(OpNode);
OpNode = new TreePatternNode(Xform, Children, OpNode->getNumTypes());

12
utils/TableGen/CodeGenInstruction.cpp
View File

@ -69,7 +69,7 @@ CGIOperandList::CGIOperandList(Record *R) : TheDef(R) {
std::string EncoderMethod;
std::string OperandType = "OPERAND_UNKNOWN";
unsigned NumOps = 1;
DagInit *MIOpInfo = 0;
DagInit *MIOpInfo = nullptr;
if (Rec->isSubClassOf("RegisterOperand")) {
PrintMethod = Rec->getValueAsString("PrintMethod");
} else if (Rec->isSubClassOf("Operand")) {
@ -182,7 +182,7 @@ CGIOperandList::ParseOperandName(const std::string &Op, bool AllowWholeOp) {
// Find the suboperand number involved.
DagInit *MIOpInfo = OperandList[OpIdx].MIOperandInfo;
if (MIOpInfo == 0)
if (!MIOpInfo)
PrintFatalError(TheDef->getName() + ": unknown suboperand name in '" + Op + "'");
// Find the operand with the right name.
@ -290,7 +290,7 @@ void CGIOperandList::ProcessDisableEncoding(std::string DisableEncoding) {
//===----------------------------------------------------------------------===//
CodeGenInstruction::CodeGenInstruction(Record *R)
: TheDef(R), Operands(R), InferredFrom(0) {
: TheDef(R), Operands(R), InferredFrom(nullptr) {
Namespace = R->getValueAsString("Namespace");
AsmString = R->getValueAsString("AsmString");
@ -436,7 +436,7 @@ bool CodeGenInstAlias::tryAliasOpMatch(DagInit *Result, unsigned AliasOpNo,
ResultOperand &ResOp) {
Init *Arg = Result->getArg(AliasOpNo);
DefInit *ADI = dyn_cast<DefInit>(Arg);
Record *ResultRecord = ADI ? ADI->getDef() : 0;
Record *ResultRecord = ADI ? ADI->getDef() : nullptr;
if (ADI && ADI->getDef() == InstOpRec) {
// If the operand is a record, it must have a name, and the record type
@ -504,7 +504,7 @@ bool CodeGenInstAlias::tryAliasOpMatch(DagInit *Result, unsigned AliasOpNo,
// throw TGError(Loc, "reg0 used for result that is not an "
// "OptionalDefOperand!");
ResOp = ResultOperand(static_cast<Record*>(0));
ResOp = ResultOperand(static_cast<Record*>(nullptr));
return true;
}
@ -542,7 +542,7 @@ CodeGenInstAlias::CodeGenInstAlias(Record *R, CodeGenTarget &T) : TheDef(R) {
// Verify that the root of the result is an instruction.
DefInit *DI = dyn_cast<DefInit>(Result->getOperator());
if (DI == 0 || !DI->getDef()->isSubClassOf("Instruction"))
if (!DI || !DI->getDef()->isSubClassOf("Instruction"))
PrintFatalError(R->getLoc(),
"result of inst alias should be an instruction");

4
utils/TableGen/CodeGenMapTable.cpp
View File

@ -326,7 +326,7 @@ Record *MapTableEmitter::getInstrForColumn(Record *KeyInstr,
const std::vector<Record*> &RelatedInstrVec = RowInstrMap[KeyValue];
ListInit *ColFields = InstrMapDesc.getColFields();
Record *MatchInstr = NULL;
Record *MatchInstr = nullptr;
for (unsigned i = 0, e = RelatedInstrVec.size(); i < e; i++) {
bool MatchFound = true;
@ -378,7 +378,7 @@ unsigned MapTableEmitter::emitBinSearchTable(raw_ostream &OS) {
unsigned RelExists = 0;
if (ColInstrs.size()) {
for (unsigned j = 0; j < NumCol; j++) {
if (ColInstrs[j] != NULL) {
if (ColInstrs[j] != nullptr) {
RelExists = 1;
OutStr += ", ";
OutStr += TargetName;

12
utils/TableGen/CodeGenRegisters.cpp
View File

@ -41,7 +41,7 @@ CodeGenSubRegIndex::CodeGenSubRegIndex(Record *R, unsigned Enum)
CodeGenSubRegIndex::CodeGenSubRegIndex(StringRef N, StringRef Nspace,
unsigned Enum)
: TheDef(0), Name(N), Namespace(Nspace), Size(-1), Offset(-1),
: TheDef(nullptr), Name(N), Namespace(Nspace), Size(-1), Offset(-1),
EnumValue(Enum), LaneMask(0), AllSuperRegsCovered(true) {
}
@ -725,7 +725,7 @@ CodeGenRegisterClass::CodeGenRegisterClass(CodeGenRegBank &RegBank, Record *R)
CodeGenRegisterClass::CodeGenRegisterClass(CodeGenRegBank &RegBank,
StringRef Name, Key Props)
: Members(*Props.Members),
TheDef(0),
TheDef(nullptr),
Name(Name),
TopoSigs(RegBank.getNumTopoSigs()),
EnumValue(-1),
@ -1312,7 +1312,7 @@ static void computeUberWeights(std::vector<UberRegSet> &UberSets,
E = UberSets.end(); I != E; ++I) {
// Initialize all unit weights in this set, and remember the max units/reg.
const CodeGenRegister *Reg = 0;
const CodeGenRegister *Reg = nullptr;
unsigned MaxWeight = 0, Weight = 0;
for (RegUnitIterator UnitI(I->Regs); UnitI.isValid(); ++UnitI) {
if (Reg != UnitI.getReg()) {
@ -1923,7 +1923,7 @@ const CodeGenRegisterClass*
CodeGenRegBank::getRegClassForRegister(Record *R) {
const CodeGenRegister *Reg = getReg(R);
ArrayRef<CodeGenRegisterClass*> RCs = getRegClasses();
const CodeGenRegisterClass *FoundRC = 0;
const CodeGenRegisterClass *FoundRC = nullptr;
for (unsigned i = 0, e = RCs.size(); i != e; ++i) {
const CodeGenRegisterClass &RC = *RCs[i];
if (!RC.contains(Reg))
@ -1938,7 +1938,7 @@ CodeGenRegBank::getRegClassForRegister(Record *R) {
// If a register's classes have different types, return null.
if (RC.getValueTypes() != FoundRC->getValueTypes())
return 0;
return nullptr;
// Check to see if the previously found class that contains
// the register is a subclass of the current class. If so,
@ -1956,7 +1956,7 @@ CodeGenRegBank::getRegClassForRegister(Record *R) {
// Multiple classes, and neither is a superclass of the other.
// Return null.
return 0;
return nullptr;
}
return FoundRC;
}

6
utils/TableGen/CodeGenSchedule.cpp
View File

@ -429,7 +429,7 @@ void CodeGenSchedModels::expandRWSeqForProc(
const CodeGenProcModel &ProcModel) const {
const CodeGenSchedRW &SchedWrite = getSchedRW(RWIdx, IsRead);
Record *AliasDef = 0;
Record *AliasDef = nullptr;
for (RecIter AI = SchedWrite.Aliases.begin(), AE = SchedWrite.Aliases.end();
AI != AE; ++AI) {
const CodeGenSchedRW &AliasRW = getSchedRW((*AI)->getValueAsDef("AliasRW"));
@ -1315,7 +1315,7 @@ static void inferFromTransitions(ArrayRef<PredTransition> LastTransitions,
IdxVec ProcIndices(I->ProcIndices.begin(), I->ProcIndices.end());
CodeGenSchedTransition SCTrans;
SCTrans.ToClassIdx =
SchedModels.addSchedClass(/*ItinClassDef=*/0, OperWritesVariant,
SchedModels.addSchedClass(/*ItinClassDef=*/nullptr, OperWritesVariant,
OperReadsVariant, ProcIndices);
SCTrans.ProcIndices = ProcIndices;
// The final PredTerm is unique set of predicates guarding the transition.
@ -1621,7 +1621,7 @@ Record *CodeGenSchedModels::findProcResUnits(Record *ProcResKind,
if (ProcResKind->isSubClassOf("ProcResourceUnits"))
return ProcResKind;
Record *ProcUnitDef = 0;
Record *ProcUnitDef = nullptr;
RecVec ProcResourceDefs =
Records.getAllDerivedDefinitions("ProcResourceUnits");

8
utils/TableGen/CodeGenTarget.cpp
View File

@ -133,7 +133,7 @@ std::string llvm::getQualifiedName(const Record *R) {
/// getTarget - Return the current instance of the Target class.
///
CodeGenTarget::CodeGenTarget(RecordKeeper &records)
: Records(records), RegBank(0), SchedModels(0) {
: Records(records), RegBank(nullptr), SchedModels(nullptr) {
std::vector<Record*> Targets = Records.getAllDerivedDefinitions("Target");
if (Targets.size() == 0)
PrintFatalError("ERROR: No 'Target' subclasses defined!");
@ -226,7 +226,7 @@ const CodeGenRegister *CodeGenTarget::getRegisterByName(StringRef Name) const {
const StringMap<CodeGenRegister*> &Regs = getRegBank().getRegistersByName();
StringMap<CodeGenRegister*>::const_iterator I = Regs.find(Name);
if (I == Regs.end())
return 0;
return nullptr;
return I->second;
}
@ -287,7 +287,7 @@ GetInstByName(const char *Name,
DenseMap<const Record*, CodeGenInstruction*>::const_iterator
I = Insts.find(Rec);
if (Rec == 0 || I == Insts.end())
if (!Rec || I == Insts.end())
PrintFatalError(Twine("Could not find '") + Name + "' instruction!");
return I->second;
}
@ -301,7 +301,7 @@ void CodeGenTarget::ComputeInstrsByEnum() const {
"GC_LABEL", "KILL", "EXTRACT_SUBREG", "INSERT_SUBREG",
"IMPLICIT_DEF", "SUBREG_TO_REG", "COPY_TO_REGCLASS", "DBG_VALUE",
"REG_SEQUENCE", "COPY", "BUNDLE", "LIFETIME_START",
"LIFETIME_END", "STACKMAP", "PATCHPOINT", 0};
"LIFETIME_END", "STACKMAP", "PATCHPOINT", nullptr};
const DenseMap<const Record*, CodeGenInstruction*> &Insts = getInstructions();
for (const char *const *p = FixedInstrs; *p; ++p) {
const CodeGenInstruction *Instr = GetInstByName(*p, Insts, Records);

4
utils/TableGen/DAGISelMatcher.cpp
View File

@ -43,7 +43,7 @@ Matcher *Matcher::unlinkNode(Matcher *Other) {
for (; Cur && Cur->getNext() != Other; Cur = Cur->getNext())
/*empty*/;
if (Cur == 0) return 0;
if (!Cur) return nullptr;
Cur->takeNext();
Cur->setNext(Other->takeNext());
return this;
@ -108,7 +108,7 @@ TreePredicateFn CheckPredicateMatcher::getPredicate() const {
void ScopeMatcher::printImpl(raw_ostream &OS, unsigned indent) const {
OS.indent(indent) << "Scope\n";
for (unsigned i = 0, e = getNumChildren(); i != e; ++i) {
if (getChild(i) == 0)
if (!getChild(i))
OS.indent(indent+1) << "NULL POINTER\n";
else
getChild(i)->print(OS, indent+2);

4
utils/TableGen/DAGISelMatcherEmitter.cpp
View File

@ -142,7 +142,7 @@ EmitMatcher(const Matcher *N, unsigned Indent, unsigned CurrentIdx,
switch (N->getKind()) {
case Matcher::Scope: {
const ScopeMatcher *SM = cast<ScopeMatcher>(N);
assert(SM->getNext() == 0 && "Shouldn't have next after scope");
assert(SM->getNext() == nullptr && "Shouldn't have next after scope");
unsigned StartIdx = CurrentIdx;
@ -725,7 +725,7 @@ void MatcherTableEmitter::EmitPredicateFunctions(formatted_raw_ostream &OS) {
}
static void BuildHistogram(const Matcher *M, std::vector<unsigned> &OpcodeFreq){
for (; M != 0; M = M->getNext()) {
for (; M != nullptr; M = M->getNext()) {
// Count this node.
if (unsigned(M->getKind()) >= OpcodeFreq.size())
OpcodeFreq.resize(M->getKind()+1);

16
utils/TableGen/DAGISelMatcherGen.cpp
View File

@ -144,7 +144,7 @@ namespace {
MatcherGen::MatcherGen(const PatternToMatch &pattern,
const CodeGenDAGPatterns &cgp)
: Pattern(pattern), CGP(cgp), NextRecordedOperandNo(0),
TheMatcher(0), CurPredicate(0) {
TheMatcher(nullptr), CurPredicate(nullptr) {
// We need to produce the matcher tree for the patterns source pattern. To do
// this we need to match the structure as well as the types. To do the type
// matching, we want to figure out the fewest number of type checks we need to
@ -182,7 +182,7 @@ void MatcherGen::InferPossibleTypes() {
/// AddMatcher - Add a matcher node to the current graph we're building.
void MatcherGen::AddMatcher(Matcher *NewNode) {
if (CurPredicate != 0)
if (CurPredicate)
CurPredicate->setNext(NewNode);
else
TheMatcher = NewNode;
@ -218,7 +218,7 @@ void MatcherGen::EmitLeafMatchCode(const TreePatternNode *N) {
}
DefInit *DI = dyn_cast<DefInit>(N->getLeafValue());
if (DI == 0) {
if (!DI) {
errs() << "Unknown leaf kind: " << *N << "\n";
abort();
}
@ -600,7 +600,7 @@ void MatcherGen::EmitResultLeafAsOperand(const TreePatternNode *N,
}
if (Def->getName() == "zero_reg") {
AddMatcher(new EmitRegisterMatcher(0, N->getType(0)));
AddMatcher(new EmitRegisterMatcher(nullptr, N->getType(0)));
ResultOps.push_back(NextRecordedOperandNo++);
return;
}
@ -642,7 +642,7 @@ GetInstPatternNode(const DAGInstruction &Inst, const TreePatternNode *N) {
else if (/*isRoot*/ N == Pattern.getDstPattern())
InstPatNode = Pattern.getSrcPattern();
else
return 0;
return nullptr;
if (InstPatNode && !InstPatNode->isLeaf() &&
InstPatNode->getOperator()->getName() == "set")
@ -806,7 +806,7 @@ EmitResultInstructionAsOperand(const TreePatternNode *N,
if (isRoot && !Pattern.getDstRegs().empty()) {
// If the root came from an implicit def in the instruction handling stuff,
// don't re-add it.
Record *HandledReg = 0;
Record *HandledReg = nullptr;
if (II.HasOneImplicitDefWithKnownVT(CGT) != MVT::Other)
HandledReg = II.ImplicitDefs[0];
@ -924,7 +924,7 @@ void MatcherGen::EmitResultCode() {
if (!Pattern.getDstRegs().empty()) {
// If the root came from an implicit def in the instruction handling stuff,
// don't re-add it.
Record *HandledReg = 0;
Record *HandledReg = nullptr;
const TreePatternNode *DstPat = Pattern.getDstPattern();
if (!DstPat->isLeaf() &&DstPat->getOperator()->isSubClassOf("Instruction")){
const CodeGenTarget &CGT = CGP.getTargetInfo();
@ -962,7 +962,7 @@ Matcher *llvm::ConvertPatternToMatcher(const PatternToMatch &Pattern,
// Generate the code for the matcher.
if (Gen.EmitMatcherCode(Variant))
return 0;
return nullptr;
// FIXME2: Kill extra MoveParent commands at the end of the matcher sequence.
// FIXME2: Split result code out to another table, and make the matcher end

20
utils/TableGen/DAGISelMatcherOpt.cpp
View File

@ -26,7 +26,7 @@ static void ContractNodes(std::unique_ptr<Matcher> &MatcherPtr,
const CodeGenDAGPatterns &CGP) {
// If we reached the end of the chain, we're done.
Matcher *N = MatcherPtr.get();
if (N == 0) return;
if (!N) return;
// If we have a scope node, walk down all of the children.
if (ScopeMatcher *Scope = dyn_cast<ScopeMatcher>(N)) {
@ -41,7 +41,7 @@ static void ContractNodes(std::unique_ptr<Matcher> &MatcherPtr,
// If we found a movechild node with a node that comes in a 'foochild' form,
// transform it.
if (MoveChildMatcher *MC = dyn_cast<MoveChildMatcher>(N)) {
Matcher *New = 0;
Matcher *New = nullptr;
if (RecordMatcher *RM = dyn_cast<RecordMatcher>(MC->getNext()))
if (MC->getChildNo() < 8) // Only have RecordChild0...7
New = new RecordChildMatcher(MC->getChildNo(), RM->getWhatFor(),
@ -191,7 +191,7 @@ static void SinkPatternPredicates(std::unique_ptr<Matcher> &MatcherPtr) {
// Recursively scan for a PatternPredicate.
// If we reached the end of the chain, we're done.
Matcher *N = MatcherPtr.get();
if (N == 0) return;
if (!N) return;
// Walk down all members of a scope node.
if (ScopeMatcher *Scope = dyn_cast<ScopeMatcher>(N)) {
@ -206,7 +206,7 @@ static void SinkPatternPredicates(std::unique_ptr<Matcher> &MatcherPtr) {
// If this node isn't a CheckPatternPredicateMatcher we keep scanning until
// we find one.
CheckPatternPredicateMatcher *CPPM =dyn_cast<CheckPatternPredicateMatcher>(N);
if (CPPM == 0)
if (!CPPM)
return SinkPatternPredicates(N->getNextPtr());
// Ok, we found one, lets try to sink it. Check if we can sink it past the
@ -236,7 +236,7 @@ static Matcher *FindNodeWithKind(Matcher *M, Matcher::KindTy Kind) {
for (; M; M = M->getNext())
if (M->getKind() == Kind)
return M;
return 0;
return nullptr;
}
@ -255,11 +255,11 @@ static Matcher *FindNodeWithKind(Matcher *M, Matcher::KindTy Kind) {
static void FactorNodes(std::unique_ptr<Matcher> &MatcherPtr) {
// If we reached the end of the chain, we're done.
Matcher *N = MatcherPtr.get();
if (N == 0) return;
if (!N) return;
// If this is not a push node, just scan for one.
ScopeMatcher *Scope = dyn_cast<ScopeMatcher>(N);
if (Scope == 0)
if (!Scope)
return FactorNodes(N->getNextPtr());
// Okay, pull together the children of the scope node into a vector so we can
@ -335,7 +335,7 @@ static void FactorNodes(std::unique_ptr<Matcher> &MatcherPtr) {
// or the same as what we're looking for. If so, reorder it.
if (Optn->isSimplePredicateOrRecordNode()) {
Matcher *M2 = FindNodeWithKind(ScanMatcher, Optn->getKind());
if (M2 != 0 && M2 != ScanMatcher &&
if (M2 && M2 != ScanMatcher &&
M2->canMoveBefore(ScanMatcher) &&
(M2->isEqual(Optn) || M2->isContradictory(Optn))) {
Matcher *MatcherWithoutM2 = ScanMatcher->unlinkNode(M2);
@ -399,7 +399,7 @@ static void FactorNodes(std::unique_ptr<Matcher> &MatcherPtr) {
}
if (NewOptionsToMatch.empty()) {
MatcherPtr.reset(0);
MatcherPtr.reset(nullptr);
return;
}
@ -427,7 +427,7 @@ static void FactorNodes(std::unique_ptr<Matcher> &MatcherPtr) {
CheckTypeMatcher *CTM =
cast_or_null<CheckTypeMatcher>(FindNodeWithKind(NewOptionsToMatch[i],
Matcher::CheckType));
if (CTM == 0 ||
if (!CTM ||
// iPTR checks could alias any other case without us knowing, don't
// bother with them.
CTM->getType() == MVT::iPTR ||

4
utils/TableGen/DFAPacketizerEmitter.cpp
View File

@ -161,7 +161,7 @@ State::State(const State &S) :
stateNum(currentStateNum++), isInitial(S.isInitial),
stateInfo(S.stateInfo) {}
DFA::DFA(): currentState(NULL) {}
DFA::DFA(): currentState(nullptr) {}
DFA::~DFA() {
DeleteContainerPointers(states);
@ -486,7 +486,7 @@ void DFAPacketizerEmitter::run(raw_ostream &OS) {
//
if (!current->hasTransition(InsnClass) &&
current->canAddInsnClass(InsnClass)) {
State *NewState = NULL;
State *NewState = nullptr;
current->AddInsnClass(InsnClass, NewStateResources);
assert(NewStateResources.size() && "New states must be generated");

6
utils/TableGen/FastISelEmitter.cpp
View File

@ -188,7 +188,7 @@ struct OperandsSignature {
return true;
}
const CodeGenRegisterClass *DstRC = 0;
const CodeGenRegisterClass *DstRC = nullptr;
for (unsigned i = 0, e = InstPatNode->getNumChildren(); i != e; ++i) {
TreePatternNode *Op = InstPatNode->getChild(i);
@ -252,7 +252,7 @@ struct OperandsSignature {
Record *OpLeafRec = OpDI->getDef();
// For now, the only other thing we accept is register operands.
const CodeGenRegisterClass *RC = 0;
const CodeGenRegisterClass *RC = nullptr;
if (OpLeafRec->isSubClassOf("RegisterOperand"))
OpLeafRec = OpLeafRec->getValueAsDef("RegClass");
if (OpLeafRec->isSubClassOf("RegisterClass"))
@ -459,7 +459,7 @@ void FastISelMap::collectPatterns(CodeGenDAGPatterns &CGP) {
// For now, ignore instructions where the first operand is not an
// output register.
const CodeGenRegisterClass *DstRC = 0;
const CodeGenRegisterClass *DstRC = nullptr;
std::string SubRegNo;
if (Op->getName() != "EXTRACT_SUBREG") {
Record *Op0Rec = II.Operands[0].Rec;

14
utils/TableGen/FixedLenDecoderEmitter.cpp
View File

@ -347,7 +347,7 @@ public:
unsigned BW,
const FixedLenDecoderEmitter *E)
: AllInstructions(Insts), Opcodes(IDs), Operands(Ops), Filters(),
Parent(NULL), BestIndex(-1), BitWidth(BW), Emitter(E) {
Parent(nullptr), BestIndex(-1), BitWidth(BW), Emitter(E) {
for (unsigned i = 0; i < BitWidth; ++i)
FilterBitValues.push_back(BIT_UNFILTERED);
@ -1776,7 +1776,7 @@ static bool populateInstruction(CodeGenTarget &Target,
// Determine if Vals[i] actually contributes to the Inst encoding.
unsigned bi = 0;
for (; bi < Bits.getNumBits(); ++bi) {
VarInit *Var = 0;
VarInit *Var = nullptr;
VarBitInit *BI = dyn_cast<VarBitInit>(Bits.getBit(bi));
if (BI)
Var = dyn_cast<VarInit>(BI->getBitVar());
@ -1798,7 +1798,7 @@ static bool populateInstruction(CodeGenTarget &Target,
// Get the bit range for this operand:
unsigned bitStart = bi++, bitWidth = 1;
for (; bi < Bits.getNumBits(); ++bi) {
VarInit *Var = 0;
VarInit *Var = nullptr;
VarBitInit *BI = dyn_cast<VarBitInit>(Bits.getBit(bi));
if (BI)
Var = dyn_cast<VarInit>(BI->getBitVar());
@ -1837,7 +1837,7 @@ static bool populateInstruction(CodeGenTarget &Target,
RecordVal *DecoderString = TypeRecord->getValue("DecoderMethod");
StringInit *String = DecoderString ?
dyn_cast<StringInit>(DecoderString->getValue()) : 0;
dyn_cast<StringInit>(DecoderString->getValue()) : nullptr;
if (String && String->getValue() != "")
Decoder = String->getValue();
@ -1866,7 +1866,7 @@ static bool populateInstruction(CodeGenTarget &Target,
DecoderString = TypeRecord->getValue("DecoderMethod");
String = DecoderString ?
dyn_cast<StringInit>(DecoderString->getValue()) : 0;
dyn_cast<StringInit>(DecoderString->getValue()) : nullptr;
if (!isReg && String && String->getValue() != "")
Decoder = String->getValue();
@ -1938,7 +1938,7 @@ static bool populateInstruction(CodeGenTarget &Target,
RecordVal *DecoderString = TypeRecord->getValue("DecoderMethod");
StringInit *String = DecoderString ?
dyn_cast<StringInit>(DecoderString->getValue()) : 0;
dyn_cast<StringInit>(DecoderString->getValue()) : nullptr;
if (!isReg && String && String->getValue() != "")
Decoder = String->getValue();
@ -1948,7 +1948,7 @@ static bool populateInstruction(CodeGenTarget &Target,
unsigned Offset = 0;
for (unsigned bi = 0; bi < Bits.getNumBits(); ++bi) {
VarInit *Var = 0;
VarInit *Var = nullptr;
VarBitInit *BI = dyn_cast<VarBitInit>(Bits.getBit(bi));
if (BI)
Var = dyn_cast<VarInit>(BI->getBitVar());

2
utils/TableGen/SetTheory.cpp
View File

@ -318,6 +318,6 @@ const RecVec *SetTheory::expand(Record *Set) {
}
// Set is not expandable.
return 0;
return nullptr;
}

12
utils/TableGen/SubtargetEmitter.cpp
View File

@ -631,7 +631,7 @@ void SubtargetEmitter::EmitProcessorResources(const CodeGenProcModel &ProcModel,
for (unsigned i = 0, e = ProcModel.ProcResourceDefs.size(); i < e; ++i) {
Record *PRDef = ProcModel.ProcResourceDefs[i];
Record *SuperDef = 0;
Record *SuperDef = nullptr;
unsigned SuperIdx = 0;
unsigned NumUnits = 0;
int BufferSize = PRDef->getValueAsInt("BufferSize");
@ -676,7 +676,7 @@ Record *SubtargetEmitter::FindWriteResources(
if (SchedWrite.TheDef->isSubClassOf("SchedWriteRes"))
return SchedWrite.TheDef;
Record *AliasDef = 0;
Record *AliasDef = nullptr;
for (RecIter AI = SchedWrite.Aliases.begin(), AE = SchedWrite.Aliases.end();
AI != AE; ++AI) {
const CodeGenSchedRW &AliasRW =
@ -696,7 +696,7 @@ Record *SubtargetEmitter::FindWriteResources(
return AliasDef;
// Check this processor's list of write resources.
Record *ResDef = 0;
Record *ResDef = nullptr;
for (RecIter WRI = ProcModel.WriteResDefs.begin(),
WRE = ProcModel.WriteResDefs.end(); WRI != WRE; ++WRI) {
if (!(*WRI)->isSubClassOf("WriteRes"))
@ -730,7 +730,7 @@ Record *SubtargetEmitter::FindReadAdvance(const CodeGenSchedRW &SchedRead,
return SchedRead.TheDef;
// Check this processor's list of aliases for SchedRead.
Record *AliasDef = 0;
Record *AliasDef = nullptr;
for (RecIter AI = SchedRead.Aliases.begin(), AE = SchedRead.Aliases.end();
AI != AE; ++AI) {
const CodeGenSchedRW &AliasRW =
@ -750,7 +750,7 @@ Record *SubtargetEmitter::FindReadAdvance(const CodeGenSchedRW &SchedRead,
return AliasDef;
// Check this processor's ReadAdvanceList.
Record *ResDef = 0;
Record *ResDef = nullptr;
for (RecIter RAI = ProcModel.ReadAdvanceDefs.begin(),
RAE = ProcModel.ReadAdvanceDefs.end(); RAI != RAE; ++RAI) {
if (!(*RAI)->isSubClassOf("ReadAdvance"))
@ -884,7 +884,7 @@ void SubtargetEmitter::GenSchedClassTables(const CodeGenProcModel &ProcModel,
if (!SCI->InstRWs.empty()) {
// This class has a default ReadWrite list which can be overriden by
// InstRW definitions.
Record *RWDef = 0;
Record *RWDef = nullptr;
for (RecIter RWI = SCI->InstRWs.begin(), RWE = SCI->InstRWs.end();
RWI != RWE; ++RWI) {
Record *RWModelDef = (*RWI)->getValueAsDef("SchedModel");

2
utils/TableGen/X86RecognizableInstr.cpp
View File

@ -788,7 +788,7 @@ void RecognizableInstr::emitDecodePath(DisassemblerTables &tables) const {
OpcodeType opcodeType = (OpcodeType)-1;
ModRMFilter* filter = NULL;
ModRMFilter* filter = nullptr;
uint8_t opcodeToSet = 0;
switch (OpMap) {