From 0974d9a5247a1f70ab739191ce5d768488a0f8aa Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Sun, 30 Dec 2007 20:55:08 +0000 Subject: [PATCH] two register machineoperands are not identical unless their subregs match. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45455 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/MachineInstr.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp index f54cbe7f1c8..e8f692e15f8 100644 --- a/lib/CodeGen/MachineInstr.cpp +++ b/lib/CodeGen/MachineInstr.cpp @@ -153,7 +153,8 @@ bool MachineOperand::isIdenticalTo(const MachineOperand &Other) const { switch (getType()) { default: assert(0 && "Unrecognized operand type"); case MachineOperand::MO_Register: - return getReg() == Other.getReg() && isDef() == Other.isDef(); + return getReg() == Other.getReg() && isDef() == Other.isDef() && + getSubReg() == Other.getSubReg(); case MachineOperand::MO_Immediate: return getImm() == Other.getImm(); case MachineOperand::MO_MachineBasicBlock: