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https://github.com/c64scene-ar/llvm-6502.git
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Completely eliminate def&use operands. Now a register operand is EITHER a
def operand or a use operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30109 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
@ -38,26 +38,6 @@ template <typename T> struct ilist;
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// Representation of each machine instruction operand.
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//
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struct MachineOperand {
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private:
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// Bit fields of the flags variable used for different operand properties
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enum {
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DEFFLAG = 0x01, // this is a def of the operand
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USEFLAG = 0x02 // this is a use of the operand
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};
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public:
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// UseType - This enum describes how the machine operand is used by
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// the instruction. Note that the MachineInstr/Operator class
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// currently uses bool arguments to represent this information
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// instead of an enum. Eventually this should change over to use
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// this _easier to read_ representation instead.
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//
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enum UseType {
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Use = USEFLAG, /// only read
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Def = DEFFLAG, /// only written
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UseAndDef = Use | Def /// read AND written
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};
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enum MachineOperandType {
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MO_Register, // Register operand.
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MO_Immediate, // Immediate Operand
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@ -78,8 +58,8 @@ private:
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int64_t immedVal; // For MO_Immediate and MO_*Index.
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} contents;
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char flags; // see bit field definitions above
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MachineOperandType opType:8; // Pack into 8 bits efficiently after flags.
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MachineOperandType opType:8; // Discriminate the union.
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bool IsDef : 1; // True if this is a def, false if this is a use.
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/// offset - Offset to address of global or external, only valid for
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/// MO_GlobalAddress, MO_ExternalSym and MO_ConstantPoolIndex
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@ -95,7 +75,7 @@ public:
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const MachineOperand &operator=(const MachineOperand &MO) {
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contents = MO.contents;
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flags = MO.flags;
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IsDef = MO.IsDef;
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opType = MO.opType;
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offset = MO.offset;
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return *this;
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@ -105,10 +85,6 @@ public:
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///
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MachineOperandType getType() const { return opType; }
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/// getUseType - Returns the MachineOperandUseType of this operand.
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///
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UseType getUseType() const { return UseType(flags & (USEFLAG|DEFFLAG)); }
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/// Accessors that tell you what kind of MachineOperand you're looking at.
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///
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bool isReg() const { return opType == MO_Register; }
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@ -167,13 +143,10 @@ public:
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return contents.SymbolName;
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}
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/// MachineOperand methods for testing that work on any kind of
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/// MachineOperand...
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///
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bool isUse() const { return flags & USEFLAG; }
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bool isDef() const { return flags & DEFFLAG; }
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MachineOperand &setUse() { flags |= USEFLAG; return *this; }
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MachineOperand &setDef() { flags |= DEFFLAG; return *this; }
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bool isUse() const { return !IsDef; }
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bool isDef() const { return IsDef; }
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void setIsUse() { IsDef = false; }
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void setIsDef() { IsDef = true; }
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/// getReg - Returns the register number.
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///
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@ -216,9 +189,10 @@ public:
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/// ChangeToRegister - Replace this operand with a new register operand of
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/// the specified value. If an operand is known to be an register already,
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/// the setReg method should be used.
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void ChangeToRegister(unsigned Reg) {
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void ChangeToRegister(unsigned Reg, bool isDef) {
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opType = MO_Register;
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contents.RegNo = Reg;
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IsDef = isDef;
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}
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friend std::ostream& operator<<(std::ostream& os, const MachineOperand& mop);
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@ -307,11 +281,10 @@ public:
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/// addRegOperand - Add a register operand.
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///
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void addRegOperand(unsigned Reg,
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MachineOperand::UseType UTy = MachineOperand::Use) {
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void addRegOperand(unsigned Reg, bool IsDef) {
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MachineOperand &Op = AddNewOperand();
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Op.opType = MachineOperand::MO_Register;
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Op.flags = UTy;
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Op.IsDef = IsDef;
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Op.contents.RegNo = Reg;
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Op.offset = 0;
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}
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@ -322,7 +295,6 @@ public:
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void addImmOperand(int64_t Val) {
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MachineOperand &Op = AddNewOperand();
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Op.opType = MachineOperand::MO_Immediate;
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Op.flags = 0;
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Op.contents.immedVal = Val;
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Op.offset = 0;
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}
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@ -330,7 +302,6 @@ public:
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void addMachineBasicBlockOperand(MachineBasicBlock *MBB) {
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MachineOperand &Op = AddNewOperand();
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Op.opType = MachineOperand::MO_MachineBasicBlock;
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Op.flags = 0;
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Op.contents.MBB = MBB;
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Op.offset = 0;
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}
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@ -340,7 +311,6 @@ public:
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void addFrameIndexOperand(unsigned Idx) {
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MachineOperand &Op = AddNewOperand();
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Op.opType = MachineOperand::MO_FrameIndex;
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Op.flags = 0;
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Op.contents.immedVal = Idx;
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Op.offset = 0;
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}
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@ -351,7 +321,6 @@ public:
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void addConstantPoolIndexOperand(unsigned Idx, int Offset) {
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MachineOperand &Op = AddNewOperand();
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Op.opType = MachineOperand::MO_ConstantPoolIndex;
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Op.flags = 0;
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Op.contents.immedVal = Idx;
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Op.offset = Offset;
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}
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@ -362,7 +331,6 @@ public:
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void addJumpTableIndexOperand(unsigned Idx) {
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MachineOperand &Op = AddNewOperand();
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Op.opType = MachineOperand::MO_JumpTableIndex;
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Op.flags = 0;
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Op.contents.immedVal = Idx;
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Op.offset = 0;
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}
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@ -370,7 +338,6 @@ public:
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void addGlobalAddressOperand(GlobalValue *GV, int Offset) {
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MachineOperand &Op = AddNewOperand();
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Op.opType = MachineOperand::MO_GlobalAddress;
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Op.flags = 0;
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Op.contents.GV = GV;
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Op.offset = Offset;
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}
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@ -380,7 +347,6 @@ public:
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void addExternalSymbolOperand(const char *SymName) {
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MachineOperand &Op = AddNewOperand();
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Op.opType = MachineOperand::MO_ExternalSymbol;
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Op.flags = 0;
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Op.contents.SymbolName = SymName;
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Op.offset = 0;
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}
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@ -33,10 +33,8 @@ public:
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/// addReg - Add a new virtual register operand...
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///
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const MachineInstrBuilder &addReg(
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int RegNo,
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MachineOperand::UseType Ty = MachineOperand::Use) const {
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MI->addRegOperand(RegNo, Ty);
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const MachineInstrBuilder &addReg(int RegNo, bool isDef = false) const {
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MI->addRegOperand(RegNo, isDef);
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return *this;
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}
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@ -92,12 +90,10 @@ inline MachineInstrBuilder BuildMI(int Opcode, unsigned NumOperands) {
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/// destination virtual register. NumOperands is the number of additional add*
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/// calls that are expected, not including the destination register.
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///
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inline MachineInstrBuilder BuildMI(
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int Opcode, unsigned NumOperands,
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unsigned DestReg,
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MachineOperand::UseType useType = MachineOperand::Def) {
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inline MachineInstrBuilder
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BuildMI(int Opcode, unsigned NumOperands, unsigned DestReg) {
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return MachineInstrBuilder(new MachineInstr(Opcode, NumOperands+1))
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.addReg(DestReg, useType);
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.addReg(DestReg, true);
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}
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/// BuildMI - This version of the builder inserts the newly-built
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@ -112,7 +108,7 @@ inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
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unsigned DestReg) {
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MachineInstr *MI = new MachineInstr(Opcode, NumOperands+1);
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BB.insert(I, MI);
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return MachineInstrBuilder(MI).addReg(DestReg, MachineOperand::Def);
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return MachineInstrBuilder(MI).addReg(DestReg, true);
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}
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/// BuildMI - This version of the builder inserts the newly-built
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