From 0a1509e779d3f97bb1df68c9e63c41ff5b66441d Mon Sep 17 00:00:00 2001
From: Eric Christopher <echristo@apple.com>
Date: Thu, 30 Jun 2011 01:05:46 +0000
Subject: [PATCH] Make sure we use the correct register class here since we'll
 need to care about spill values.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134122 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/Alpha/AlphaISelLowering.cpp | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/lib/Target/Alpha/AlphaISelLowering.cpp b/lib/Target/Alpha/AlphaISelLowering.cpp
index 54433a4c36f..daf95551896 100644
--- a/lib/Target/Alpha/AlphaISelLowering.cpp
+++ b/lib/Target/Alpha/AlphaISelLowering.cpp
@@ -835,7 +835,8 @@ getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const
     case 'r':
       return std::make_pair(0U, Alpha::GPRCRegisterClass);
     case 'f':
-      return std::make_pair(0U, Alpha::F4RCRegisterClass);
+      return VT == MVT::f64 ? std::make_pair(0U, Alpha::F8RCRegisterClass) :
+	std::make_pair(0U, Alpha::F4RCRegisterClass);
     }
   }
   return TargetLowering::getRegForInlineAsmConstraint(Constraint, VT);