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fix an x86 fast isel issue where we'd completely give up on folding an address

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when we have a global variable base an an index.  Instead, just give up on
folding the global variable.

Before we'd geenrate:

_test:                                  ## @test
## BB#0:
	movq	_rtx_length@GOTPCREL(%rip), %rax
	leaq	(%rax), %rax
	addq	%rdi, %rax
	movzbl	(%rax), %eax
	ret

now we generate:

_test:                                  ## @test
## BB#0:
	movq	_rtx_length@GOTPCREL(%rip), %rax
	movzbl	(%rax,%rdi), %eax
	ret

The difference is even more significant when there is a scale
involved.

This fixes rdar://9289558 - total fail with addr mode formation at -O0/x86-64


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129664 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
2011-04-17 17:47:38 +00:00
parent 685090f598
commit 0a1c997c27
2 changed files with 94 additions and 78 deletions
Download Patch File Download Diff File Expand all files Collapse all files

20
lib/Target/X86/X86FastISel.cpp
View File

@@ -460,21 +460,20 @@ bool X86FastISel::X86SelectAddress(const Value *V, X86AddressMode &AM) {
// Handle constant address.
if (const GlobalValue *GV = dyn_cast<GlobalValue>(V)) {
// Can't handle alternate code models yet.
// Can't handle alternate code models or TLS yet.
if (TM.getCodeModel() != CodeModel::Small)
return false;
// RIP-relative addresses can't have additional register operands.
if (Subtarget->isPICStyleRIPRel() &&
(AM.Base.Reg != 0 || AM.IndexReg != 0))
return false;
// Can't handle TLS yet.
if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV))
if (GVar->isThreadLocal())
return false;
// Okay, we've committed to selecting this global. Set up the basic address.
// RIP-relative addresses can't have additional register operands, so if
// we've already folded stuff into the addressing mode, just force the
// global value into its own register, which we can use as the basereg.
if (!Subtarget->isPICStyleRIPRel() ||
(AM.Base.Reg == 0 && AM.IndexReg == 0)) {
// Okay, we've committed to selecting this global. Set up the address.
AM.GV = GV;
// Allow the subtarget to classify the global.
@@ -499,8 +498,8 @@ bool X86FastISel::X86SelectAddress(const Value *V, X86AddressMode &AM) {
return true;
}
// Ok, we need to do a load from a stub. If we've already loaded from this
// stub, reuse the loaded pointer, otherwise emit the load now.
// Ok, we need to do a load from a stub. If we've already loaded from
// this stub, reuse the loaded pointer, otherwise emit the load now.
DenseMap<const Value*, unsigned>::iterator I = LocalValueMap.find(V);
unsigned LoadReg;
if (I != LocalValueMap.end() && I->second != 0) {
@@ -546,6 +545,7 @@ bool X86FastISel::X86SelectAddress(const Value *V, X86AddressMode &AM) {
AM.GV = 0;
return true;
}
}
// If all else fails, try to materialize the value in a register.
if (!AM.GV || !Subtarget->isPICStyleRIPRel()) {

24
test/CodeGen/X86/fast-isel-x86-64.ll
View File

@@ -28,11 +28,11 @@ if.then: ; preds = %entry
if.end: ; preds = %if.then, %entry
ret void
}
; CHECK: test2:
; CHECK: movq %rdi, -8(%rsp)
; CHECK: cmpq $42, -8(%rsp)
}
@@ -40,8 +40,24 @@ if.end: ; preds = %if.then, %entry
define i64 @test3() nounwind {
%A = ptrtoint i32* @G to i64
ret i64 %A
}
; CHECK: test3:
; CHECK: movq _G@GOTPCREL(%rip), %rax
; CHECK-NEXT: ret
}
; rdar://9289558
@rtx_length = external global [153 x i8]
define i32 @test4(i64 %idxprom9) nounwind {
%arrayidx10 = getelementptr inbounds [153 x i8]* @rtx_length, i32 0, i64 %idxprom9
%tmp11 = load i8* %arrayidx10, align 1
%conv = zext i8 %tmp11 to i32
ret i32 %conv
; CHECK: test4:
; CHECK: movq _rtx_length@GOTPCREL(%rip), %rax
; CHECK-NEXT: movzbl (%rax,%rdi), %eax
; CHECK-NEXT: ret
}