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use update_llc_test_checks.py to tighten checking; remove unnecessary testing params
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234029 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1,4 +1,4 @@
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx | FileCheck %s
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s
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; Check that we generate vector conversion from float to narrower int types
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@ -8,8 +8,16 @@
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define void @fptoui16(%f32vec_t %a, %i16vec_t *%p) {
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; CHECK-LABEL: fptoui16:
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; CHECK: vcvttps2dq %ymm
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; CHECK-NOT: vcvttss2si
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; CHECK: # BB#0:
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; CHECK-NEXT: vcvttps2dq %ymm0, %ymm0
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; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm1
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; CHECK-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
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; CHECK-NEXT: vpshufb %xmm2, %xmm1, %xmm1
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; CHECK-NEXT: vpshufb %xmm2, %xmm0, %xmm0
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; CHECK-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
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; CHECK-NEXT: vmovdqa %xmm0, (%rdi)
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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%b = fptoui %f32vec_t %a to %i16vec_t
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store %i16vec_t %b, %i16vec_t * %p
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ret void
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@ -17,8 +25,16 @@ define void @fptoui16(%f32vec_t %a, %i16vec_t *%p) {
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define void @fptosi16(%f32vec_t %a, %i16vec_t *%p) {
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; CHECK-LABEL: fptosi16:
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; CHECK: vcvttps2dq %ymm
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; CHECK-NOT: vcvttss2si
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; CHECK: # BB#0:
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; CHECK-NEXT: vcvttps2dq %ymm0, %ymm0
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; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm1
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; CHECK-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
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; CHECK-NEXT: vpshufb %xmm2, %xmm1, %xmm1
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; CHECK-NEXT: vpshufb %xmm2, %xmm0, %xmm0
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; CHECK-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
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; CHECK-NEXT: vmovdqa %xmm0, (%rdi)
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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%b = fptosi %f32vec_t %a to %i16vec_t
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store %i16vec_t %b, %i16vec_t * %p
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ret void
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@ -26,8 +42,17 @@ define void @fptosi16(%f32vec_t %a, %i16vec_t *%p) {
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define void @fptoui8(%f32vec_t %a, %i8vec_t *%p) {
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; CHECK-LABEL: fptoui8:
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; CHECK: vcvttps2dq %ymm
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; CHECK-NOT: vcvttss2si
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; CHECK: # BB#0:
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; CHECK-NEXT: vcvttps2dq %ymm0, %ymm0
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; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm1
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; CHECK-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
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; CHECK-NEXT: vpshufb %xmm2, %xmm1, %xmm1
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; CHECK-NEXT: vpshufb %xmm2, %xmm0, %xmm0
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; CHECK-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
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; CHECK-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
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; CHECK-NEXT: vmovq %xmm0, (%rdi)
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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%b = fptoui %f32vec_t %a to %i8vec_t
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store %i8vec_t %b, %i8vec_t * %p
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ret void
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@ -35,8 +60,17 @@ define void @fptoui8(%f32vec_t %a, %i8vec_t *%p) {
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define void @fptosi8(%f32vec_t %a, %i8vec_t *%p) {
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; CHECK-LABEL: fptosi8:
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; CHECK: vcvttps2dq %ymm
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; CHECK-NOT: vcvttss2si
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; CHECK: # BB#0:
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; CHECK-NEXT: vcvttps2dq %ymm0, %ymm0
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; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm1
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; CHECK-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
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; CHECK-NEXT: vpshufb %xmm2, %xmm1, %xmm1
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; CHECK-NEXT: vpshufb %xmm2, %xmm0, %xmm0
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; CHECK-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
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; CHECK-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
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; CHECK-NEXT: vmovq %xmm0, (%rdi)
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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%b = fptosi %f32vec_t %a to %i8vec_t
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store %i8vec_t %b, %i8vec_t * %p
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ret void
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