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add support for fstcw, PR8259

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115154 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2010-09-30 16:39:29 +00:00
parent 8ebf66236e
commit 0bb83a84d4
2 changed files with 14 additions and 2 deletions
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10
lib/Target/X86/AsmParser/X86AsmParser.cpp
View File

@ -1119,13 +1119,19 @@ MatchAndEmitInstruction(SMLoc IDLoc,
// First, handle aliases that expand to multiple instructions.
// FIXME: This should be replaced with a real .td file alias mechanism.
if (Op->getToken() == "fstsw") {
if (Op->getToken() == "fstsw" || Op->getToken() == "fstcw") {
MCInst Inst;
Inst.setOpcode(X86::WAIT);
Out.EmitInstruction(Inst);
delete Operands[0];
Operands[0] = X86Operand::CreateToken("fnstsw", IDLoc);
const char *Repl =
StringSwitch<const char*>(Op->getToken())
.Case("fstsw", "fnstsw")
.Case("fstcw", "fnstcw")
.Default(0);
assert(Repl && "Unknown wait-prefixed instruction");
Operands[0] = X86Operand::CreateToken(Repl, IDLoc);
}

6
test/MC/AsmParser/X86/x86_instructions.s
View File

@ -416,6 +416,11 @@ fstsw (%rax)
// CHECK: wait
// CHECK: fnstsw (%rax)
// PR8259
fstcw (%rsp)
// CHECK: wait
// CHECK: fnstcw (%rsp)
// rdar://8456382 - cvtsd2si support.
cvtsd2si %xmm1, %rax
@ -474,3 +479,4 @@ fdivrp %st(1), %st(0) // CHECK: encoding: [0xde,0xf9]
fsubrp %ST(0), %ST(1) // CHECK: encoding: [0xde,0xe9]
fsubrp %ST(1), %ST(0) // CHECK: encoding: [0xde,0xe9]