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	replace switch stmt with an assert, generate li 0 instead of lis 0 for 0,
to make the code follow people's expectations better. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22861 91177308-0d34-0410-b5e6-96231b3b80d8
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		@@ -1732,26 +1732,23 @@ unsigned ISel::SelectExpr(SDOperand N, bool Recording) {
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    return Result;
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  }
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  case ISD::Constant:
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    switch (N.getValueType()) {
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    default: assert(0 && "Cannot use constants of this type!");
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    case MVT::i32:
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      {
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        int v = (int)cast<ConstantSDNode>(N)->getSignExtended();
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  case ISD::Constant: {
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    assert(N.getValueType() == MVT::i32 &&
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           "Only i32 constants are legal on this target!");
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    int v = (int)cast<ConstantSDNode>(N)->getValue();
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    unsigned Hi = Hi16(v);
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    unsigned Lo = Lo16(v);
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    if (Hi && Lo) {
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      Tmp1 = MakeIntReg();
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      BuildMI(BB, PPC::LIS, 1, Tmp1).addSImm(Hi);
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      BuildMI(BB, PPC::ORI, 2, Result).addReg(Tmp1).addImm(Lo);
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        } else if (Lo) {
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          BuildMI(BB, PPC::LI, 1, Result).addSImm(Lo);
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        } else {
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    } else if (Hi) {
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      BuildMI(BB, PPC::LIS, 1, Result).addSImm(Hi);
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        }
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      }
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    } else {
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      BuildMI(BB, PPC::LI, 1, Result).addSImm(Lo);
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    }
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    return Result;
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  }
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  case ISD::ConstantFP: {
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    ConstantFPSDNode *CN = cast<ConstantFPSDNode>(N);
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