Reformat a loop for basic hygeine. Self review.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199788 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Trick 2014-01-22 03:38:55 +00:00
parent 6a0fffd799
commit 0c1b9ec2dc

View File

@ -2527,17 +2527,17 @@ void GenericScheduler::initPolicy(MachineBasicBlock::iterator Begin,
MachineBasicBlock::iterator End, MachineBasicBlock::iterator End,
unsigned NumRegionInstrs) { unsigned NumRegionInstrs) {
const TargetMachine &TM = Context->MF->getTarget(); const TargetMachine &TM = Context->MF->getTarget();
const TargetLowering *TLI = TM.getTargetLowering();
// Avoid setting up the register pressure tracker for small regions to save // Avoid setting up the register pressure tracker for small regions to save
// compile time. As a rough heuristic, only track pressure when the number of // compile time. As a rough heuristic, only track pressure when the number of
// schedulable instructions exceeds half the integer register file. // schedulable instructions exceeds half the integer register file.
RegionPolicy.ShouldTrackPressure = true; RegionPolicy.ShouldTrackPressure = true;
unsigned LegalIntVT = MVT::i32; for (unsigned VT = MVT::i32; VT > (unsigned)MVT::i1; --VT) {
for (; LegalIntVT > (unsigned)MVT::i1; --LegalIntVT) { MVT::SimpleValueType LegalIntVT = (MVT::SimpleValueType)VT;
if (TM.getTargetLowering()->isTypeLegal((MVT::SimpleValueType)LegalIntVT)) { if (TLI->isTypeLegal(LegalIntVT)) {
unsigned NIntRegs = Context->RegClassInfo->getNumAllocatableRegs( unsigned NIntRegs = Context->RegClassInfo->getNumAllocatableRegs(
TM.getTargetLowering()->getRegClassFor( TLI->getRegClassFor(LegalIntVT));
(MVT::SimpleValueType)LegalIntVT));
RegionPolicy.ShouldTrackPressure = NumRegionInstrs > (NIntRegs / 2); RegionPolicy.ShouldTrackPressure = NumRegionInstrs > (NIntRegs / 2);
} }
} }