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ARM: Thumb2 LDR(literal) can target SP.
Fix a slightly overzealous destination register restriction for the 'without .w' alias. Add some explicit testcases. rdar://16033140 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201173 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -4365,7 +4365,7 @@ def : t2InstAlias<"ldrsh${p} $Rt, $addr",
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(t2LDRSHs rGPR:$Rt, t2addrmode_so_reg:$addr, pred:$p)>;
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def : t2InstAlias<"ldr${p} $Rt, $addr",
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(t2LDRpci rGPR:$Rt, t2ldrlabel:$addr, pred:$p)>;
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(t2LDRpci GPRnopc:$Rt, t2ldrlabel:$addr, pred:$p)>;
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def : t2InstAlias<"ldrb${p} $Rt, $addr",
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(t2LDRBpci rGPR:$Rt, t2ldrlabel:$addr, pred:$p)>;
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def : t2InstAlias<"ldrh${p} $Rt, $addr",
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@ -800,11 +800,14 @@ _func:
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@------------------------------------------------------------------------------
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ldr.w r5, _foo
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ldr lr, (_strcmp-4)
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ldr sp, _foo
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@ CHECK: ldr.w r5, _foo @ encoding: [0x5f'A',0xf8'A',A,0x50'A']
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@ CHECK: @ fixup A - offset: 0, value: _foo, kind: fixup_t2_ldst_pcrel_12
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@ CHECK: ldr.w lr, _strcmp-4 @ encoding: [0x5f'A',0xf8'A',A,0xe0'A']
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@ CHECK: @ fixup A - offset: 0, value: _strcmp-4, kind: fixup_t2_ldst_pcrel_12
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@ CHECK: ldr.w sp, _foo @ encoding: [0x5f'A',0xf8'A',A,0xd0'A']
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@ CHECK: @ fixup A - offset: 0, value: _foo, kind: fixup_t2_ldst_pcrel_12
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ldr r7, [pc, #8]
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ldr.n r7, [pc, #8]
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@ -818,6 +821,7 @@ _func:
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ldr r8, [pc, #132]
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ldr pc, [pc, #256]
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ldr pc, [pc, #-400]
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ldr sp, [pc, #4]
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@ CHECK: ldr r7, [pc, #8] @ encoding: [0x02,0x4f]
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@ CHECK: ldr r7, [pc, #8] @ encoding: [0x02,0x4f]
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@ -831,6 +835,7 @@ _func:
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@ CHECK: ldr.w r8, [pc, #132] @ encoding: [0xdf,0xf8,0x84,0x80]
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@ CHECK: ldr.w pc, [pc, #256] @ encoding: [0xdf,0xf8,0x00,0xf1]
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@ CHECK: ldr.w pc, [pc, #-400] @ encoding: [0x5f,0xf8,0x90,0xf1]
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@ CHECK: ldr.w sp, [pc, #4] @ encoding: [0xdf,0xf8,0x04,0xd0]
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ldrb r9, [pc, #-0]
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ldrsb r11, [pc, #-0]
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