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Don't use getNextOperandForReg().

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This way of using getNextOperandForReg() was unlikely to work as
intended. We don't give any guarantees about the order of operands in
the use-def chains, so looking only at operands following a given
operand in the chain doesn't make sense.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161542 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen
2012-08-08 23:44:04 +00:00
parent 4e6966266a
commit 0c5f5f4916
2 changed files with 8 additions and 2 deletions
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5
lib/Target/Hexagon/HexagonHardwareLoops.cpp
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@@ -328,7 +328,10 @@ CountValue *HexagonHardwareLoops::getTripCount(MachineLoop *L) const {
// can get a useful trip count. The trip count can // can get a useful trip count. The trip count can
// be either a register or an immediate. The location // be either a register or an immediate. The location
// of the value depends upon the type (reg or imm). // of the value depends upon the type (reg or imm).
while ((IV_Opnd = IV_Opnd->getNextOperandForReg())) { for (MachineRegisterInfo::reg_iterator
RI = MRI->reg_begin(IV_Opnd->getReg()), RE = MRI->reg_end();
RI != RE; ++RI) {
IV_Opnd = &RI.getOperand();
const MachineInstr *MI = IV_Opnd->getParent(); const MachineInstr *MI = IV_Opnd->getParent();
if (L->contains(MI) && isCompareEqualsImm(MI)) { if (L->contains(MI) && isCompareEqualsImm(MI)) {
const MachineOperand &MO = MI->getOperand(2); const MachineOperand &MO = MI->getOperand(2);

5
lib/Target/PowerPC/PPCCTRLoops.cpp
View File

@@ -337,7 +337,10 @@ CountValue *PPCCTRLoops::getTripCount(MachineLoop *L,
// can get a useful trip count. The trip count can // can get a useful trip count. The trip count can
// be either a register or an immediate. The location // be either a register or an immediate. The location
// of the value depends upon the type (reg or imm). // of the value depends upon the type (reg or imm).
while ((IV_Opnd = IV_Opnd->getNextOperandForReg())) { for (MachineRegisterInfo::reg_iterator
RI = MRI->reg_begin(IV_Opnd->getReg()), RE = MRI->reg_end();
RI != RE; ++RI) {
IV_Opnd = &RI.getOperand();
bool SignedCmp; bool SignedCmp;
MachineInstr *MI = IV_Opnd->getParent(); MachineInstr *MI = IV_Opnd->getParent();
if (L->contains(MI) && isCompareEqualsImm(MI, SignedCmp) && if (L->contains(MI) && isCompareEqualsImm(MI, SignedCmp) &&