mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-28 19:31:58 +00:00
Delete the allocate*TargetMachine function, which is now dead .
The shared command line options are now in a header that makes sense. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14756 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
4e547ec8bf
commit
0cf0c37469
@ -14,7 +14,7 @@
|
||||
#include "PowerPC.h"
|
||||
#include "llvm/Module.h"
|
||||
#include "llvm/PassManager.h"
|
||||
#include "llvm/Target/TargetMachineImpls.h"
|
||||
#include "llvm/Target/TargetOptions.h"
|
||||
#include "llvm/Target/TargetMachineRegistry.h"
|
||||
#include "llvm/CodeGen/MachineFunction.h"
|
||||
#include "llvm/CodeGen/Passes.h"
|
||||
@ -25,14 +25,6 @@ namespace {
|
||||
RegisterTarget<PowerPCTargetMachine> X("powerpc", " PowerPC (experimental)");
|
||||
}
|
||||
|
||||
// allocatePowerPCTargetMachine - Allocate and return a subclass of
|
||||
// TargetMachine that implements the PowerPC backend.
|
||||
//
|
||||
TargetMachine *llvm::allocatePowerPCTargetMachine(const Module &M,
|
||||
IntrinsicLowering *IL) {
|
||||
return new PowerPCTargetMachine(M, IL);
|
||||
}
|
||||
|
||||
/// PowerPCTargetMachine ctor - Create an ILP32 architecture model
|
||||
///
|
||||
PowerPCTargetMachine::PowerPCTargetMachine(const Module &M,
|
||||
|
@ -16,7 +16,7 @@
|
||||
#include "llvm/PassManager.h"
|
||||
#include "llvm/CodeGen/MachineFunction.h"
|
||||
#include "llvm/CodeGen/Passes.h"
|
||||
#include "llvm/Target/TargetMachineImpls.h"
|
||||
#include "llvm/Target/TargetOptions.h"
|
||||
#include "llvm/Target/TargetMachineRegistry.h"
|
||||
#include "llvm/Transforms/Scalar.h"
|
||||
#include <iostream>
|
||||
@ -27,14 +27,6 @@ namespace {
|
||||
RegisterTarget<SparcV8TargetMachine> X("sparcv8"," SPARC V8 (experimental)");
|
||||
}
|
||||
|
||||
// allocateSparcV8TargetMachine - Allocate and return a subclass of
|
||||
// TargetMachine that implements the SparcV8 backend.
|
||||
//
|
||||
TargetMachine *llvm::allocateSparcV8TargetMachine(const Module &M,
|
||||
IntrinsicLowering *IL) {
|
||||
return new SparcV8TargetMachine(M, IL);
|
||||
}
|
||||
|
||||
/// SparcV8TargetMachine ctor - Create an ILP32 architecture model
|
||||
///
|
||||
SparcV8TargetMachine::SparcV8TargetMachine(const Module &M,
|
||||
|
@ -16,7 +16,7 @@
|
||||
#include "llvm/PassManager.h"
|
||||
#include "llvm/CodeGen/MachineFunction.h"
|
||||
#include "llvm/CodeGen/Passes.h"
|
||||
#include "llvm/Target/TargetMachineImpls.h"
|
||||
#include "llvm/Target/TargetOptions.h"
|
||||
#include "llvm/Target/TargetMachineRegistry.h"
|
||||
#include "llvm/Transforms/Scalar.h"
|
||||
#include <iostream>
|
||||
@ -27,14 +27,6 @@ namespace {
|
||||
RegisterTarget<SparcV8TargetMachine> X("sparcv8"," SPARC V8 (experimental)");
|
||||
}
|
||||
|
||||
// allocateSparcV8TargetMachine - Allocate and return a subclass of
|
||||
// TargetMachine that implements the SparcV8 backend.
|
||||
//
|
||||
TargetMachine *llvm::allocateSparcV8TargetMachine(const Module &M,
|
||||
IntrinsicLowering *IL) {
|
||||
return new SparcV8TargetMachine(M, IL);
|
||||
}
|
||||
|
||||
/// SparcV8TargetMachine ctor - Create an ILP32 architecture model
|
||||
///
|
||||
SparcV8TargetMachine::SparcV8TargetMachine(const Module &M,
|
||||
|
@ -23,7 +23,7 @@
|
||||
#include "llvm/CodeGen/MachineFunctionInfo.h"
|
||||
#include "llvm/CodeGen/MachineCodeForInstruction.h"
|
||||
#include "llvm/CodeGen/Passes.h"
|
||||
#include "llvm/Target/TargetMachineImpls.h"
|
||||
#include "llvm/Target/TargetOptions.h"
|
||||
#include "llvm/Target/TargetMachineRegistry.h"
|
||||
#include "llvm/Transforms/Scalar.h"
|
||||
#include "MappingInfo.h"
|
||||
@ -287,11 +287,3 @@ void SparcV9JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
|
||||
PM.add(createMachineFunctionPrinterPass(&std::cerr, "Final code:\n"));
|
||||
}
|
||||
|
||||
/// allocateSparcV9TargetMachine - Allocate and return a subclass of
|
||||
/// TargetMachine that implements the SparcV9 backend. (the
|
||||
/// llvm/CodeGen/SparcV9.h interface)
|
||||
///
|
||||
TargetMachine *llvm::allocateSparcV9TargetMachine(const Module &M,
|
||||
IntrinsicLowering *IL) {
|
||||
return new SparcV9TargetMachine(M, IL);
|
||||
}
|
||||
|
@ -23,7 +23,7 @@
|
||||
#include "llvm/CodeGen/MachineFrameInfo.h"
|
||||
#include "llvm/Target/TargetFrameInfo.h"
|
||||
#include "llvm/Target/TargetMachine.h"
|
||||
#include "llvm/Target/TargetMachineImpls.h"
|
||||
#include "llvm/Target/TargetOptions.h"
|
||||
#include "Support/CommandLine.h"
|
||||
#include "Support/STLExtras.h"
|
||||
#include <iostream>
|
||||
|
@ -18,7 +18,7 @@
|
||||
#include "llvm/CodeGen/IntrinsicLowering.h"
|
||||
#include "llvm/CodeGen/MachineFunction.h"
|
||||
#include "llvm/CodeGen/Passes.h"
|
||||
#include "llvm/Target/TargetMachineImpls.h"
|
||||
#include "llvm/Target/TargetOptions.h"
|
||||
#include "llvm/Target/TargetMachineRegistry.h"
|
||||
#include "llvm/Transforms/Scalar.h"
|
||||
#include "Support/CommandLine.h"
|
||||
@ -41,14 +41,6 @@ namespace {
|
||||
RegisterTarget<X86TargetMachine> X("x86", " IA-32 (Pentium and above)");
|
||||
}
|
||||
|
||||
// allocateX86TargetMachine - Allocate and return a subclass of TargetMachine
|
||||
// that implements the X86 backend.
|
||||
//
|
||||
TargetMachine *llvm::allocateX86TargetMachine(const Module &M,
|
||||
IntrinsicLowering *IL) {
|
||||
return new X86TargetMachine(M, IL);
|
||||
}
|
||||
|
||||
unsigned X86TargetMachine::getJITMatchQuality() {
|
||||
#if defined(i386) || defined(__i386__) || defined(__x86__)
|
||||
return 10;
|
||||
|
Loading…
Reference in New Issue
Block a user