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ARM: Correctly align arguments after a byval struct is passed on the stack

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202985 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Oliver Stannard
2014-03-05 15:25:27 +00:00
parent f6003a6337
commit 0d31d1e612
8 changed files with 245 additions and 67 deletions
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129
lib/Target/ARM/ARMISelLowering.cpp
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@ -1826,22 +1826,6 @@ ARMTargetLowering::HandleByVal(
State->getCallOrPrologue() == Call) &&
"unhandled ParmContext");
// For in-prologue parameters handling, we also introduce stack offset
// for byval registers: see CallingConvLower.cpp, CCState::HandleByVal.
// This behaviour outsides AAPCS rules (5.5 Parameters Passing) of how
// NSAA should be evaluted (NSAA means "next stacked argument address").
// So: NextStackOffset = NSAAOffset + SizeOfByValParamsStoredInRegs.
// Then: NSAAOffset = NextStackOffset - SizeOfByValParamsStoredInRegs.
unsigned NSAAOffset = State->getNextStackOffset();
if (State->getCallOrPrologue() != Call) {
for (unsigned i = 0, e = State->getInRegsParamsCount(); i != e; ++i) {
unsigned RB, RE;
State->getInRegsParamInfo(i, RB, RE);
assert(NSAAOffset >= (RE-RB)*4 &&
"Stack offset for byval regs doesn't introduced anymore?");
NSAAOffset -= (RE-RB)*4;
}
}
if ((ARM::R0 <= reg) && (reg <= ARM::R3)) {
if (Subtarget->isAAPCS_ABI() && Align > 4) {
unsigned AlignInRegs = Align / 4;
@ -1856,6 +1840,7 @@ ARMTargetLowering::HandleByVal(
// all remained GPR regs. In that case we can't split parameter, we must
// send it to stack. We also must set NCRN to R4, so waste all
// remained registers.
const unsigned NSAAOffset = State->getNextStackOffset();
if (Subtarget->isAAPCS_ABI() && NSAAOffset != 0 && size > excess) {
while (State->AllocateReg(GPRArgRegs, 4))
;
@ -1875,18 +1860,14 @@ ARMTargetLowering::HandleByVal(
// allocate remained amount of registers we need.
for (unsigned i = reg+1; i != ByValRegEnd; ++i)
State->AllocateReg(GPRArgRegs, 4);
// At a call site, a byval parameter that is split between
// registers and memory needs its size truncated here. In a
// function prologue, such byval parameters are reassembled in
// memory, and are not truncated.
if (State->getCallOrPrologue() == Call) {
// Make remained size equal to 0 in case, when
// the whole structure may be stored into registers.
if (size < excess)
size = 0;
else
size -= excess;
}
// A byval parameter that is split between registers and memory needs its
// size truncated here.
// In the case where the entire structure fits in registers, we set the
// size in memory to zero.
if (size < excess)
size = 0;
else
size -= excess;
}
}
}
@ -2794,7 +2775,9 @@ ARMTargetLowering::StoreByValRegs(CCState &CCInfo, SelectionDAG &DAG,
unsigned OffsetFromOrigArg,
unsigned ArgOffset,
unsigned ArgSize,
bool ForceMutable) const {
bool ForceMutable,
unsigned ByValStoreOffset,
unsigned TotalArgRegsSaveSize) const {
// Currently, two use-cases possible:
// Case #1. Non-var-args function, and we meet first byval parameter.
@ -2831,7 +2814,6 @@ ARMTargetLowering::StoreByValRegs(CCState &CCInfo, SelectionDAG &DAG,
// Note: once stack area for byval/varargs registers
// was initialized, it can't be initialized again.
if (ArgRegsSaveSize) {
unsigned Padding = ArgRegsSaveSize - ArgRegsSize;
if (Padding) {
@ -2840,11 +2822,18 @@ ARMTargetLowering::StoreByValRegs(CCState &CCInfo, SelectionDAG &DAG,
AFI->setStoredByValParamsPadding(Padding);
}
int FrameIndex = MFI->CreateFixedObject(
ArgRegsSaveSize,
Padding + ArgOffset,
false);
int FrameIndex = MFI->CreateFixedObject(ArgRegsSaveSize,
Padding +
ByValStoreOffset -
(int64_t)TotalArgRegsSaveSize,
false);
SDValue FIN = DAG.getFrameIndex(FrameIndex, getPointerTy());
if (Padding) {
MFI->CreateFixedObject(Padding,
ArgOffset + ByValStoreOffset -
(int64_t)ArgRegsSaveSize,
false);
}
SmallVector<SDValue, 4> MemOps;
for (unsigned i = 0; firstRegToSaveIndex < lastRegToSaveIndex;
@ -2872,10 +2861,16 @@ ARMTargetLowering::StoreByValRegs(CCState &CCInfo, SelectionDAG &DAG,
Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
&MemOps[0], MemOps.size());
return FrameIndex;
} else
} else {
if (ArgSize == 0) {
// We cannot allocate a zero-byte object for the first variadic argument,
// so just make up a size.
ArgSize = 4;
}
// This will point to the next argument passed via stack.
return MFI->CreateFixedObject(
4, AFI->getStoredByValParamsPadding() + ArgOffset, !ForceMutable);
ArgSize, ArgOffset, !ForceMutable);
}
}
// Setup stack frame, the va_list pointer will start from.
@ -2883,6 +2878,7 @@ void
ARMTargetLowering::VarArgStyleRegisters(CCState &CCInfo, SelectionDAG &DAG,
SDLoc dl, SDValue &Chain,
unsigned ArgOffset,
unsigned TotalArgRegsSaveSize,
bool ForceMutable) const {
MachineFunction &MF = DAG.getMachineFunction();
ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
@ -2894,7 +2890,7 @@ ARMTargetLowering::VarArgStyleRegisters(CCState &CCInfo, SelectionDAG &DAG,
// argument passed via stack.
int FrameIndex =
StoreByValRegs(CCInfo, DAG, dl, Chain, 0, CCInfo.getInRegsParamsCount(),
0, ArgOffset, 0, ForceMutable);
0, ArgOffset, 0, ForceMutable, 0, TotalArgRegsSaveSize);
AFI->setVarArgsFrameIndex(FrameIndex);
}
@ -2931,6 +2927,51 @@ ARMTargetLowering::LowerFormalArguments(SDValue Chain,
// We also increase this value in case of varargs function.
AFI->setArgRegsSaveSize(0);
unsigned ByValStoreOffset = 0;
unsigned TotalArgRegsSaveSize = 0;
unsigned ArgRegsSaveSizeMaxAlign = 4;
// Calculate the amount of stack space that we need to allocate to store
// byval and variadic arguments that are passed in registers.
// We need to know this before we allocate the first byval or variadic
// argument, as they will be allocated a stack slot below the CFA (Canonical
// Frame Address, the stack pointer at entry to the function).
for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {
CCValAssign &VA = ArgLocs[i];
if (VA.isMemLoc()) {
int index = VA.getValNo();
if (index != lastInsIndex) {
ISD::ArgFlagsTy Flags = Ins[index].Flags;
if (Flags.isByVal()) {
unsigned ExtraArgRegsSize;
unsigned ExtraArgRegsSaveSize;
computeRegArea(CCInfo, MF, CCInfo.getInRegsParamsProceed(),
Flags.getByValSize(),
ExtraArgRegsSize, ExtraArgRegsSaveSize);
TotalArgRegsSaveSize += ExtraArgRegsSaveSize;
if (Flags.getByValAlign() > ArgRegsSaveSizeMaxAlign)
ArgRegsSaveSizeMaxAlign = Flags.getByValAlign();
CCInfo.nextInRegsParam();
}
lastInsIndex = index;
}
}
}
CCInfo.rewindByValRegsInfo();
lastInsIndex = -1;
if (isVarArg) {
unsigned ExtraArgRegsSize;
unsigned ExtraArgRegsSaveSize;
computeRegArea(CCInfo, MF, CCInfo.getInRegsParamsCount(), 0,
ExtraArgRegsSize, ExtraArgRegsSaveSize);
TotalArgRegsSaveSize += ExtraArgRegsSaveSize;
}
// If the arg regs save area contains N-byte aligned values, the
// bottom of it must be at least N-byte aligned.
TotalArgRegsSaveSize = RoundUpToAlignment(TotalArgRegsSaveSize, ArgRegsSaveSizeMaxAlign);
TotalArgRegsSaveSize = std::min(TotalArgRegsSaveSize, 16U);
for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {
CCValAssign &VA = ArgLocs[i];
std::advance(CurOrigArg, Ins[VA.getValNo()].OrigArgIndex - CurArgIdx);
@ -3029,18 +3070,23 @@ ARMTargetLowering::LowerFormalArguments(SDValue Chain,
// a tail call.
if (Flags.isByVal()) {
unsigned CurByValIndex = CCInfo.getInRegsParamsProceed();
ByValStoreOffset = RoundUpToAlignment(ByValStoreOffset, Flags.getByValAlign());
int FrameIndex = StoreByValRegs(
CCInfo, DAG, dl, Chain, CurOrigArg,
CurByValIndex,
Ins[VA.getValNo()].PartOffset,
VA.getLocMemOffset(),
Flags.getByValSize(),
true /*force mutable frames*/);
true /*force mutable frames*/,
ByValStoreOffset,
TotalArgRegsSaveSize);
ByValStoreOffset += Flags.getByValSize();
ByValStoreOffset = std::min(ByValStoreOffset, 16U);
InVals.push_back(DAG.getFrameIndex(FrameIndex, getPointerTy()));
CCInfo.nextInRegsParam();
} else {
unsigned FIOffset = VA.getLocMemOffset() +
AFI->getStoredByValParamsPadding();
unsigned FIOffset = VA.getLocMemOffset();
int FI = MFI->CreateFixedObject(VA.getLocVT().getSizeInBits()/8,
FIOffset, true);
@ -3058,7 +3104,8 @@ ARMTargetLowering::LowerFormalArguments(SDValue Chain,
// varargs
if (isVarArg)
VarArgStyleRegisters(CCInfo, DAG, dl, Chain,
CCInfo.getNextStackOffset());
CCInfo.getNextStackOffset(),
TotalArgRegsSaveSize);
return Chain;
}