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Moved InsertCallerSaveInstr to the SparcRegInfo.cpp and made machine independent
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1107 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -166,13 +166,13 @@ public:
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|| getDescriptor(opCode).iclass & M_PREFETCH_FLAG
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|| getDescriptor(opCode).iclass & M_STORE_FLAG;
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}
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bool isDummyPhiInstr(MachineOpCode opCode) const {
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bool isDummyPhiInstr(const MachineOpCode opCode) const {
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return getDescriptor(opCode).iclass & M_DUMMY_PHI_FLAG;
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}
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// delete this later *******
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bool isPhi(MachineOpCode opCode) { return isDummyPhiInstr(opCode); }
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bool isPhi(const MachineOpCode opCode) { return isDummyPhiInstr(opCode); }
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// Check if an instruction can be issued before its operands are ready,
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@ -166,13 +166,13 @@ public:
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|| getDescriptor(opCode).iclass & M_PREFETCH_FLAG
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|| getDescriptor(opCode).iclass & M_STORE_FLAG;
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}
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bool isDummyPhiInstr(MachineOpCode opCode) const {
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bool isDummyPhiInstr(const MachineOpCode opCode) const {
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return getDescriptor(opCode).iclass & M_DUMMY_PHI_FLAG;
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}
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// delete this later *******
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bool isPhi(MachineOpCode opCode) { return isDummyPhiInstr(opCode); }
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bool isPhi(const MachineOpCode opCode) { return isDummyPhiInstr(opCode); }
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// Check if an instruction can be issued before its operands are ready,
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@ -142,14 +142,17 @@ public:
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cpReg2RegMI(const unsigned SrcReg, const unsigned DestReg,
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const int RegType) const=0;
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virtual MachineInstr *
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cpReg2MemMI(const unsigned SrcReg, const unsigned DestPtrReg,
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virtual MachineInstr *
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cpReg2MemMI(const unsigned SrcReg, const unsigned DestPtrReg,
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const int Offset, const int RegType) const=0;
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virtual MachineInstr *
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virtual MachineInstr *
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cpMem2RegMI(const unsigned SrcPtrReg, const int Offset,
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const unsigned DestReg, const int RegType) const=0;
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virtual MachineInstr *cpValue2Value( Value *Src, Value *Dest) const=0;
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virtual bool isRegVolatile(const int RegClassID, const int Reg) const=0;
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