Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo down

to MCRegisterInfo. Also initialize the mapping at construction time.

This patch eliminate TargetRegisterInfo from TargetAsmInfo. It's another step
towards fixing the layering violation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135424 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
2011-07-18 20:57:22 +00:00
parent 1360bc8eb0
commit 0e6a052331
70 changed files with 646 additions and 605 deletions

View File

@@ -27,6 +27,7 @@ class MCContext;
class MCAsmInfo;
class MCDisassembler;
class MCInstPrinter;
class MCRegisterInfo;
class Target;
class TargetMachine;
@@ -58,6 +59,8 @@ private:
const Target *TheTarget;
// The assembly information for the target architecture.
llvm::OwningPtr<const llvm::MCAsmInfo> MAI;
// The register information for the target architecture.
llvm::OwningPtr<const llvm::MCRegisterInfo> MRI;
// The target machine instance.
llvm::OwningPtr<llvm::TargetMachine> TM;
// The disassembler for the target architecture.
@@ -76,6 +79,7 @@ public:
LLVMOpInfoCallback getOpInfo,
LLVMSymbolLookupCallback symbolLookUp,
const Target *theTarget, const MCAsmInfo *mAI,
const MCRegisterInfo *mRI,
llvm::TargetMachine *tM, const TargetAsmInfo *tai,
llvm::MCContext *ctx, const MCDisassembler *disAsm,
MCInstPrinter *iP) : TripleName(tripleName),
@@ -83,6 +87,7 @@ public:
SymbolLookUp(symbolLookUp), TheTarget(theTarget), Tai(tai) {
TM.reset(tM);
MAI.reset(mAI);
MRI.reset(mRI);
Ctx.reset(ctx);
DisAsm.reset(disAsm);
IP.reset(iP);