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Tidy up to match coding standards. Remove 'else' after 'return' and moving operators to end of preceding line. No functional change intended.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164887 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2012-09-29 07:18:53 +00:00
parent 32b7343a96
commit 0eb5dadf65
1 changed files with 24 additions and 27 deletions
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51
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@ -3003,7 +3003,7 @@ SDValue DAGCombiner::MatchBSwapHWord(SDNode *N, SDValue N0, SDValue N1) {
SDValue ShAmt = DAG.getConstant(16, getShiftAmountTy(VT)); SDValue ShAmt = DAG.getConstant(16, getShiftAmountTy(VT));
if (TLI.isOperationLegalOrCustom(ISD::ROTL, VT)) if (TLI.isOperationLegalOrCustom(ISD::ROTL, VT))
return DAG.getNode(ISD::ROTL, N->getDebugLoc(), VT, BSwap, ShAmt); return DAG.getNode(ISD::ROTL, N->getDebugLoc(), VT, BSwap, ShAmt);
else if (TLI.isOperationLegalOrCustom(ISD::ROTR, VT)) if (TLI.isOperationLegalOrCustom(ISD::ROTR, VT))
return DAG.getNode(ISD::ROTR, N->getDebugLoc(), VT, BSwap, ShAmt); return DAG.getNode(ISD::ROTR, N->getDebugLoc(), VT, BSwap, ShAmt);
return DAG.getNode(ISD::OR, N->getDebugLoc(), VT, return DAG.getNode(ISD::OR, N->getDebugLoc(), VT,
DAG.getNode(ISD::SHL, N->getDebugLoc(), VT, BSwap, ShAmt), DAG.getNode(ISD::SHL, N->getDebugLoc(), VT, BSwap, ShAmt),
@ -3275,14 +3275,14 @@ SDNode *DAGCombiner::MatchRotate(SDValue LHS, SDValue RHS, DebugLoc DL) {
} }
// Look for sign/zext/any-extended or truncate cases: // Look for sign/zext/any-extended or truncate cases:
if ((LHSShiftAmt.getOpcode() == ISD::SIGN_EXTEND if ((LHSShiftAmt.getOpcode() == ISD::SIGN_EXTEND ||
|| LHSShiftAmt.getOpcode() == ISD::ZERO_EXTEND LHSShiftAmt.getOpcode() == ISD::ZERO_EXTEND ||
|| LHSShiftAmt.getOpcode() == ISD::ANY_EXTEND LHSShiftAmt.getOpcode() == ISD::ANY_EXTEND ||
|| LHSShiftAmt.getOpcode() == ISD::TRUNCATE) && LHSShiftAmt.getOpcode() == ISD::TRUNCATE) &&
(RHSShiftAmt.getOpcode() == ISD::SIGN_EXTEND (RHSShiftAmt.getOpcode() == ISD::SIGN_EXTEND ||
|| RHSShiftAmt.getOpcode() == ISD::ZERO_EXTEND RHSShiftAmt.getOpcode() == ISD::ZERO_EXTEND ||
|| RHSShiftAmt.getOpcode() == ISD::ANY_EXTEND RHSShiftAmt.getOpcode() == ISD::ANY_EXTEND ||
|| RHSShiftAmt.getOpcode() == ISD::TRUNCATE)) { RHSShiftAmt.getOpcode() == ISD::TRUNCATE)) {
SDValue LExtOp0 = LHSShiftAmt.getOperand(0); SDValue LExtOp0 = LHSShiftAmt.getOperand(0);
SDValue RExtOp0 = RHSShiftAmt.getOperand(0); SDValue RExtOp0 = RHSShiftAmt.getOperand(0);
if (RExtOp0.getOpcode() == ISD::SUB && if (RExtOp0.getOpcode() == ISD::SUB &&
@ -4421,20 +4421,18 @@ SDValue DAGCombiner::visitSIGN_EXTEND(SDNode *N) {
// If the desired elements are smaller or larger than the source // If the desired elements are smaller or larger than the source
// elements we can use a matching integer vector type and then // elements we can use a matching integer vector type and then
// truncate/sign extend // truncate/sign extend
else { EVT MatchingElementType =
EVT MatchingElementType = EVT::getIntegerVT(*DAG.getContext(),
EVT::getIntegerVT(*DAG.getContext(), N0VT.getScalarType().getSizeInBits());
N0VT.getScalarType().getSizeInBits()); EVT MatchingVectorType =
EVT MatchingVectorType = EVT::getVectorVT(*DAG.getContext(), MatchingElementType,
EVT::getVectorVT(*DAG.getContext(), MatchingElementType, N0VT.getVectorNumElements());
N0VT.getVectorNumElements());
if (SVT == MatchingVectorType) { if (SVT == MatchingVectorType) {
SDValue VsetCC = DAG.getSetCC(N->getDebugLoc(), MatchingVectorType, SDValue VsetCC = DAG.getSetCC(N->getDebugLoc(), MatchingVectorType,
N0.getOperand(0), N0.getOperand(1), N0.getOperand(0), N0.getOperand(1),
cast<CondCodeSDNode>(N0.getOperand(2))->get()); cast<CondCodeSDNode>(N0.getOperand(2))->get());
return DAG.getSExtOrTrunc(VsetCC, N->getDebugLoc(), VT); return DAG.getSExtOrTrunc(VsetCC, N->getDebugLoc(), VT);
}
} }
} }
@ -5244,13 +5242,12 @@ SDValue DAGCombiner::visitTRUNCATE(SDNode *N) {
// if the source is smaller than the dest, we still need an extend // if the source is smaller than the dest, we still need an extend
return DAG.getNode(N0.getOpcode(), N->getDebugLoc(), VT, return DAG.getNode(N0.getOpcode(), N->getDebugLoc(), VT,
N0.getOperand(0)); N0.getOperand(0));
else if (N0.getOperand(0).getValueType().bitsGT(VT)) if (N0.getOperand(0).getValueType().bitsGT(VT))
// if the source is larger than the dest, than we just need the truncate // if the source is larger than the dest, than we just need the truncate
return DAG.getNode(ISD::TRUNCATE, N->getDebugLoc(), VT, N0.getOperand(0)); return DAG.getNode(ISD::TRUNCATE, N->getDebugLoc(), VT, N0.getOperand(0));
else // if the source and dest are the same type, we can drop both the extend
// if the source and dest are the same type, we can drop both the extend // and the truncate.
// and the truncate. return N0.getOperand(0);
return N0.getOperand(0);
} }
// Fold extract-and-trunc into a narrow extract. For example: // Fold extract-and-trunc into a narrow extract. For example: