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Added 32-bit Thumb instructions t2NOP, t2YIELD, t2WFE, t2WFI, t2SEV, and t2DBG

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for disassembly only.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97632 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Johnny Chen
2010-03-03 02:09:43 +00:00
parent 32f9eb2bc3
commit 0f7866e796
1 changed files with 28 additions and 0 deletions
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28
lib/Target/ARM/ARMInstrThumb2.td
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@@ -2341,6 +2341,34 @@ def t2CPS : T2XI<(outs),(ins i32imm:$opt), NoItinerary, "cps${opt:cps}",
let Inst{12} = 0; let Inst{12} = 0;
} }
// A6.3.4 Branches and miscellaneous control
// Table A6-14 Change Processor State, and hint instructions
// Helper class for disassembly only.
class T2I_hint<bits<8> op7_0, string opc, string asm>
: T2I<(outs), (ins), NoItinerary, opc, asm,
[/* For disassembly only; pattern left blank */]> {
let Inst{31-20} = 0xf3a;
let Inst{15-14} = 0b10;
let Inst{12} = 0;
let Inst{10-8} = 0b000;
let Inst{7-0} = op7_0;
}
def t2NOP : T2I_hint<0b00000000, "nop", ".w">;
def t2YIELD : T2I_hint<0b00000001, "yield", ".w">;
def t2WFE : T2I_hint<0b00000010, "wfe", ".w">;
def t2WFI : T2I_hint<0b00000011, "wfi", ".w">;
def t2SEV : T2I_hint<0b00000100, "sev", ".w">;
def t2DBG : T2I<(outs),(ins i32imm:$opt), NoItinerary, "dbg", "\t$opt",
[/* For disassembly only; pattern left blank */]> {
let Inst{31-20} = 0xf3a;
let Inst{15-14} = 0b10;
let Inst{12} = 0;
let Inst{10-8} = 0b000;
let Inst{7-4} = 0b1111;
}
// Secure Monitor Call is a system instruction -- for disassembly only // Secure Monitor Call is a system instruction -- for disassembly only
// Option = Inst{19-16} // Option = Inst{19-16}
def t2SMC : T2I<(outs), (ins i32imm:$opt), NoItinerary, "smc", "\t$opt", def t2SMC : T2I<(outs), (ins i32imm:$opt), NoItinerary, "smc", "\t$opt",