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Revert r150288, "Allow Post-RA LICM to hoist reserved register reads."

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This caused miscompilations on out-of-tree targets, and possibly i386 as
well.

I'll find some other way of hoisting %rip-relative loads from loops
containing calls.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150816 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2012-02-17 16:40:44 +00:00
parent 406262a69f
commit 0f7de3542f
1 changed files with 0 additions and 11 deletions
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11
lib/CodeGen/MachineLICM.cpp
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@ -68,7 +68,6 @@ namespace {
MachineRegisterInfo *MRI; MachineRegisterInfo *MRI;
const InstrItineraryData *InstrItins; const InstrItineraryData *InstrItins;
bool PreRegAlloc; bool PreRegAlloc;
BitVector ReservedRegs;
// Various analyses that we use... // Various analyses that we use...
AliasAnalysis *AA; // Alias analysis info. AliasAnalysis *AA; // Alias analysis info.
@ -338,8 +337,6 @@ bool MachineLICM::runOnMachineFunction(MachineFunction &MF) {
for (TargetRegisterInfo::regclass_iterator I = TRI->regclass_begin(), for (TargetRegisterInfo::regclass_iterator I = TRI->regclass_begin(),
E = TRI->regclass_end(); I != E; ++I) E = TRI->regclass_end(); I != E; ++I)
RegLimit[(*I)->getID()] = TRI->getRegPressureLimit(*I, MF); RegLimit[(*I)->getID()] = TRI->getRegPressureLimit(*I, MF);
} else {
ReservedRegs = TRI->getReservedRegs(MF);
} }
// Get our Loop information... // Get our Loop information...
@ -429,9 +426,6 @@ void MachineLICM::ProcessMI(MachineInstr *MI,
"Not expecting virtual register!"); "Not expecting virtual register!");
if (!MO.isDef()) { if (!MO.isDef()) {
// Allow reserved register reads to be hoisted.
if (ReservedRegs.test(Reg))
continue;
if (Reg && (PhysRegDefs.test(Reg) || PhysRegClobbers.test(Reg))) if (Reg && (PhysRegDefs.test(Reg) || PhysRegClobbers.test(Reg)))
// If it's using a non-loop-invariant register, then it's obviously not // If it's using a non-loop-invariant register, then it's obviously not
// safe to hoist. // safe to hoist.
@ -537,11 +531,6 @@ void MachineLICM::HoistRegionPostRA() {
const MachineOperand &MO = MI->getOperand(j); const MachineOperand &MO = MI->getOperand(j);
if (!MO.isReg() || MO.isDef() || !MO.getReg()) if (!MO.isReg() || MO.isDef() || !MO.getReg())
continue; continue;
// Allow hoisting of reserved register reads that aren't call preserved.
// For example %rip.
// IsLoopInvariantInst() already checks MRI->isConstantPhysReg().
if (ReservedRegs.test(MO.getReg()))
continue;
if (PhysRegDefs.test(MO.getReg()) || if (PhysRegDefs.test(MO.getReg()) ||
PhysRegClobbers.test(MO.getReg())) { PhysRegClobbers.test(MO.getReg())) {
// If it's using a non-loop-invariant register, then it's obviously // If it's using a non-loop-invariant register, then it's obviously