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Coding style fixes.

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- Fix indentation.
- Move comments.
- Fit lines in 80 columns.
- Remove dead code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132724 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Akira Hatanaka 2011-06-07 18:58:42 +00:00
parent ffe9a7116c
commit 0f84382138
3 changed files with 31 additions and 44 deletions
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7
lib/Target/Mips/MipsFrameLowering.cpp
View File

@ -195,15 +195,16 @@ void MipsFrameLowering::emitPrologue(MachineFunction &MF) const {
SrcML = MachineLocation(MachineLocation::VirtualFP, -StackSize);
Moves.push_back(MachineMove(AdjustSPLabel, DstML, SrcML));
// Find the instruction past the last instruction that saves a callee-saved
// register to the stack.
const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
if (CSI.size()) {
// Find the instruction past the last instruction that saves a callee-saved
// register to the stack.
for (unsigned i = 0; i < CSI.size(); ++i)
++MBBI;
// Iterate over list of callee-saved registers and emit .cfi_offset directives.
// Iterate over list of callee-saved registers and emit .cfi_offset
// directives.
MCSymbol *CSLabel = MMI.getContext().CreateTempSymbol();
BuildMI(MBB, MBBI, dl,
TII.get(TargetOpcode::PROLOG_LABEL)).addSym(CSLabel);

12
lib/Target/Mips/MipsISelDAGToDAG.cpp
View File

@ -323,7 +323,6 @@ SDNode* MipsDAGToDAGISel::Select(SDNode *Node) {
// tablegen selection should be handled here.
///
switch(Opcode) {
default: break;
case ISD::SUBE:
@ -357,10 +356,6 @@ SDNode* MipsDAGToDAGISel::Select(SDNode *Node) {
LHS, SDValue(AddCarry,0));
}
/// Mul/Div with two results
case ISD::SDIVREM:
case ISD::UDIVREM:
break;
case ISD::SMUL_LOHI:
case ISD::UMUL_LOHI: {
SDValue Op1 = Node->getOperand(0);
@ -407,13 +402,6 @@ SDNode* MipsDAGToDAGISel::Select(SDNode *Node) {
return CurDAG->getMachineNode(Mips::MFHI, dl, MVT::i32, InFlag);
}
/// Div/Rem operations
case ISD::SREM:
case ISD::UREM:
case ISD::SDIV:
case ISD::UDIV:
break;
// Get target GOT address.
case ISD::GLOBAL_OFFSET_TABLE:
return getGlobalBaseReg();

56
lib/Target/Mips/MipsISelLowering.cpp
View File

@ -13,7 +13,6 @@
//===----------------------------------------------------------------------===//
#define DEBUG_TYPE "mips-lower"
//#include <algorithm>
#include "MipsISelLowering.h"
#include "MipsMachineFunction.h"
#include "MipsTargetMachine.h"
@ -60,7 +59,7 @@ const char *MipsTargetLowering::getTargetNodeName(unsigned Opcode) const {
case MipsISD::BuildPairF64: return "MipsISD::BuildPairF64";
case MipsISD::ExtractElementF64: return "MipsISD::ExtractElementF64";
case MipsISD::WrapperPIC: return "MipsISD::WrapperPIC";
default: return NULL;
default: return NULL;
}
}
@ -722,7 +721,8 @@ MipsTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
// Mips::ATOMIC_LOAD_NAND_I32 (when Nand == true)
MachineBasicBlock *
MipsTargetLowering::EmitAtomicBinary(MachineInstr *MI, MachineBasicBlock *BB,
unsigned Size, unsigned BinOpcode, bool Nand) const {
unsigned Size, unsigned BinOpcode,
bool Nand) const {
assert(Size == 4 && "Unsupported size for EmitAtomicBinary.");
MachineFunction *MF = BB->getParent();
@ -815,8 +815,9 @@ MipsTargetLowering::EmitAtomicBinary(MachineInstr *MI, MachineBasicBlock *BB,
MachineBasicBlock *
MipsTargetLowering::EmitAtomicBinaryPartword(MachineInstr *MI,
MachineBasicBlock *BB, unsigned Size, unsigned BinOpcode,
bool Nand) const {
MachineBasicBlock *BB,
unsigned Size, unsigned BinOpcode,
bool Nand) const {
assert((Size == 1 || Size == 2) &&
"Unsupported size for EmitAtomicBinaryPartial.");
@ -974,8 +975,8 @@ MipsTargetLowering::EmitAtomicBinaryPartword(MachineInstr *MI,
MachineBasicBlock *
MipsTargetLowering::EmitAtomicCmpSwap(MachineInstr *MI,
MachineBasicBlock *BB,
unsigned Size) const {
MachineBasicBlock *BB,
unsigned Size) const {
assert(Size == 4 && "Unsupported size for EmitAtomicCmpSwap.");
MachineFunction *MF = BB->getParent();
@ -1061,8 +1062,8 @@ MipsTargetLowering::EmitAtomicCmpSwap(MachineInstr *MI,
MachineBasicBlock *
MipsTargetLowering::EmitAtomicCmpSwapPartword(MachineInstr *MI,
MachineBasicBlock *BB,
unsigned Size) const {
MachineBasicBlock *BB,
unsigned Size) const {
assert((Size == 1 || Size == 2) &&
"Unsupported size for EmitAtomicCmpSwapPartial.");
@ -1296,26 +1297,23 @@ SDValue MipsTargetLowering::LowerGlobalAddress(SDValue Op,
SDValue HiPart = DAG.getNode(MipsISD::Hi, dl, VTs, &GAHi, 1);
SDValue Lo = DAG.getNode(MipsISD::Lo, dl, MVT::i32, GALo);
return DAG.getNode(ISD::ADD, dl, MVT::i32, HiPart, Lo);
} else {
SDValue GA = DAG.getTargetGlobalAddress(GV, dl, MVT::i32, 0,
MipsII::MO_GOT);
GA = DAG.getNode(MipsISD::WrapperPIC, dl, MVT::i32, GA);
SDValue ResNode = DAG.getLoad(MVT::i32, dl,
DAG.getEntryNode(), GA, MachinePointerInfo(),
false, false, 0);
// On functions and global targets not internal linked only
// a load from got/GP is necessary for PIC to work.
if (!GV->hasInternalLinkage() &&
(!GV->hasLocalLinkage() || isa<Function>(GV)))
return ResNode;
SDValue GALo = DAG.getTargetGlobalAddress(GV, dl, MVT::i32, 0,
MipsII::MO_ABS_LO);
SDValue Lo = DAG.getNode(MipsISD::Lo, dl, MVT::i32, GALo);
return DAG.getNode(ISD::ADD, dl, MVT::i32, ResNode, Lo);
}
llvm_unreachable("Dont know how to handle GlobalAddress");
return SDValue(0,0);
SDValue GA = DAG.getTargetGlobalAddress(GV, dl, MVT::i32, 0,
MipsII::MO_GOT);
GA = DAG.getNode(MipsISD::WrapperPIC, dl, MVT::i32, GA);
SDValue ResNode = DAG.getLoad(MVT::i32, dl,
DAG.getEntryNode(), GA, MachinePointerInfo(),
false, false, 0);
// On functions and global targets not internal linked only
// a load from got/GP is necessary for PIC to work.
if (!GV->hasInternalLinkage() &&
(!GV->hasLocalLinkage() || isa<Function>(GV)))
return ResNode;
SDValue GALo = DAG.getTargetGlobalAddress(GV, dl, MVT::i32, 0,
MipsII::MO_ABS_LO);
SDValue Lo = DAG.getNode(MipsISD::Lo, dl, MVT::i32, GALo);
return DAG.getNode(ISD::ADD, dl, MVT::i32, ResNode, Lo);
}
SDValue MipsTargetLowering::LowerBlockAddress(SDValue Op,
@ -1555,7 +1553,8 @@ SDValue MipsTargetLowering::LowerFCOPYSIGN(SDValue Op, SelectionDAG &DAG)
SDValue MipsTargetLowering::
LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const {
unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
assert((Depth == 0) && "Frame address can only be determined for current frame.");
assert((Depth == 0) &&
"Frame address can only be determined for current frame.");
MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
MFI->setFrameAddressIsTaken(true);
@ -1988,7 +1987,6 @@ MipsTargetLowering::LowerCallResult(SDValue Chain, SDValue InFlag,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
SmallVectorImpl<SDValue> &InVals) const {
// Assign locations to each value returned by this call.
SmallVector<CCValAssign, 16> RVLocs;
CCState CCInfo(CallConv, isVarArg, getTargetMachine(),