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Revert "Take account of boolean vector contents when promoting a build vector from i1 to some other type. rdar://problem/12210060"

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This reverts commit 5dd9e214fb.

Thanks to Duncan for explaining how this should have been done.

Conflicts:

	test/CodeGen/X86/vec_select.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163064 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Pete Cooper
2012-09-01 17:37:55 +00:00
parent 8fccd013d8
commit 0fc44aba18
2 changed files with 1 additions and 33 deletions
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18
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
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@@ -2913,24 +2913,8 @@ SDValue DAGTypeLegalizer::PromoteIntRes_BUILD_VECTOR(SDNode *N) {
SmallVector<SDValue, 8> Ops;
Ops.reserve(NumElems);
unsigned ExtendOp = ISD::ANY_EXTEND;
// Extending boolean constants needs to consider the
// value boolean vector constants take on this target and extend
// with sign or zeros appropriately.
if (OutVT.getVectorElementType() == MVT::i1) {
switch (TLI.getBooleanContents(true)) {
case TargetLowering::UndefinedBooleanContent:
break;
case TargetLowering::ZeroOrOneBooleanContent:
ExtendOp = ISD::ZERO_EXTEND;
break;
case TargetLowering::ZeroOrNegativeOneBooleanContent:
ExtendOp = ISD::SIGN_EXTEND;
break;
}
}
for (unsigned i = 0; i != NumElems; ++i) {
SDValue Op = DAG.getNode(ExtendOp, dl, NOutVTElem, N->getOperand(i));
SDValue Op = DAG.getNode(ISD::ANY_EXTEND, dl, NOutVTElem, N->getOperand(i));
Ops.push_back(Op);
}