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Properly save and restore RA and Mips16 callee save registers S0,S1
Patch by Reed Kotler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164349 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -66,7 +66,42 @@ spillCalleeSavedRegisters(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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const std::vector<CalleeSavedInfo> &CSI,
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const TargetRegisterInfo *TRI) const {
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// FIXME: implement.
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MachineFunction *MF = MBB.getParent();
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MachineBasicBlock *EntryBlock = MF->begin();
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const TargetInstrInfo &TII = *MF->getTarget().getInstrInfo();
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//
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// Registers RA, S0,S1 are the callee saved registers and they
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// will be saved with the "save" instruction
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// during emitPrologue
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//
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for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
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// Add the callee-saved register as live-in. Do not add if the register is
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// RA and return address is taken, because it has already been added in
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// method MipsTargetLowering::LowerRETURNADDR.
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// It's killed at the spill, unless the register is RA and return address
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// is taken.
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unsigned Reg = CSI[i].getReg();
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bool IsRAAndRetAddrIsTaken = (Reg == Mips::RA)
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&& MF->getFrameInfo()->isReturnAddressTaken();
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if (!IsRAAndRetAddrIsTaken)
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EntryBlock->addLiveIn(Reg);
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}
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return true;
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}
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bool Mips16FrameLowering::restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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const std::vector<CalleeSavedInfo> &CSI,
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const TargetRegisterInfo *TRI) const {
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//
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// Registers RA,S0,S1 are the callee saved registers and they will be restored
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// with the restore instruction during emitEpilogue.
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// We need to override this virtual function, otherwise llvm will try and
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// restore the registers on it's on from the stack.
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//
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return true;
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}
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@ -79,6 +114,9 @@ Mips16FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
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void Mips16FrameLowering::
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processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
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RegScavenger *RS) const {
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MF.getRegInfo().setPhysRegUsed(Mips::RA);
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MF.getRegInfo().setPhysRegUsed(Mips::S0);
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MF.getRegInfo().setPhysRegUsed(Mips::S1);
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}
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const MipsFrameLowering *
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@ -32,6 +32,11 @@ public:
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const std::vector<CalleeSavedInfo> &CSI,
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const TargetRegisterInfo *TRI) const;
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bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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const std::vector<CalleeSavedInfo> &CSI,
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const TargetRegisterInfo *TRI) const;
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bool hasReservedCallFrame(const MachineFunction &MF) const;
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void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
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@ -254,10 +254,12 @@ def OrRxRxRy16: FRxRxRy16_ins<0b01101, "or", IIAlu>, ArithLogic16Defs<1>;
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// for direct object emitter, encoding needs to be adjusted for the
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// frame size
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//
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let ra=1, s=0,s0=0,s1=0 in
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let ra=1, s=0,s0=1,s1=1 in
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def RestoreRaF16:
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FI8_SVRS16<0b1, (outs), (ins uimm16:$frame_size),
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"restore \t$$ra, $frame_size", [], IILoad >;
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"restore \t$$ra, $$s0, $$s1, $frame_size", [], IILoad > {
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let isCodeGenOnly = 1;
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}
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//
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// Format: SAVE {ra,}{s0/s1/s0-1,}{framesize} (All arguments are optional)
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@ -266,11 +268,12 @@ def RestoreRaF16:
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// To set up a stack frame on entry to a subroutine,
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// saving return address and static registers, and adjusting stack
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//
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let ra=1, s=1,s0=0,s1=0 in
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let ra=1, s=1,s0=1,s1=1 in
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def SaveRaF16:
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FI8_SVRS16<0b1, (outs), (ins uimm16:$frame_size),
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"save \t$$ra, $frame_size", [], IILoad >;
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"save \t$$ra, $$s0, $$s1, $frame_size", [], IILoad > {
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let isCodeGenOnly = 1;
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}
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//
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// Format: SB ry, offset(rx) MIPS16e
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// Purpose: Store Byte (Extended)
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