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[NVPTX] Add support for selecting CUDA vs OCL mode based on triple

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IR for CUDA should use "nvptx[64]-nvidia-cuda", and IR for NV OpenCL should use "nvptx[64]-nvidia-nvcl"

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184579 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Justin Holewinski 2013-06-21 18:51:49 +00:00
parent c22e02b1f4
commit 0ff4287fe2
9 changed files with 29 additions and 22 deletions
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7
include/llvm/ADT/Triple.h
View File

@ -81,7 +81,8 @@ public:
BGP,
BGQ,
Freescale,
IBM
IBM,
NVIDIA
};
enum OSType {
UnknownOS,
@ -107,7 +108,9 @@ public:
NaCl, // Native Client
CNK, // BG/P Compute-Node Kernel
Bitrig,
AIX
AIX,
CUDA, // NVIDIA CUDA
NVCL // NVIDIA OpenCL
};
enum EnvironmentType {
UnknownEnvironment,

6
lib/Support/Triple.cpp
View File

@ -104,6 +104,7 @@ const char *Triple::getVendorTypeName(VendorType Kind) {
case BGQ: return "bgq";
case Freescale: return "fsl";
case IBM: return "ibm";
case NVIDIA: return "nvidia";
}
llvm_unreachable("Invalid VendorType!");
@ -135,6 +136,8 @@ const char *Triple::getOSTypeName(OSType Kind) {
case CNK: return "cnk";
case Bitrig: return "bitrig";
case AIX: return "aix";
case CUDA: return "cuda";
case NVCL: return "nvcl";
}
llvm_unreachable("Invalid OSType");
@ -260,6 +263,7 @@ static Triple::VendorType parseVendor(StringRef VendorName) {
.Case("bgq", Triple::BGQ)
.Case("fsl", Triple::Freescale)
.Case("ibm", Triple::IBM)
.Case("nvidia", Triple::NVIDIA)
.Default(Triple::UnknownVendor);
}
@ -287,6 +291,8 @@ static Triple::OSType parseOS(StringRef OSName) {
.StartsWith("cnk", Triple::CNK)
.StartsWith("bitrig", Triple::Bitrig)
.StartsWith("aix", Triple::AIX)
.StartsWith("cuda", Triple::CUDA)
.StartsWith("nvcl", Triple::NVCL)
.Default(Triple::UnknownOS);
}

3
lib/Target/NVPTX/NVPTX.h
View File

@ -77,8 +77,7 @@ extern Target TheNVPTXTarget64;
namespace NVPTX {
enum DrvInterface {
NVCL,
CUDA,
TEST
CUDA
};
// A field inside TSFlags needs a shift and a mask. The usage is

17
lib/Target/NVPTX/NVPTXSubtarget.cpp
View File

@ -19,23 +19,18 @@
using namespace llvm;
// Select Driver Interface
#include "llvm/Support/CommandLine.h"
namespace {
cl::opt<NVPTX::DrvInterface> DriverInterface(
cl::desc("Choose driver interface:"),
cl::values(clEnumValN(NVPTX::NVCL, "drvnvcl", "Nvidia OpenCL driver"),
clEnumValN(NVPTX::CUDA, "drvcuda", "Nvidia CUDA driver"),
clEnumValN(NVPTX::TEST, "drvtest", "Plain Test"), clEnumValEnd),
cl::init(NVPTX::NVCL));
}
NVPTXSubtarget::NVPTXSubtarget(const std::string &TT, const std::string &CPU,
const std::string &FS, bool is64Bit)
: NVPTXGenSubtargetInfo(TT, CPU, FS), Is64Bit(is64Bit), PTXVersion(0),
SmVersion(20) {
drvInterface = DriverInterface;
Triple T(TT);
if (T.getOS() == Triple::NVCL)
drvInterface = NVPTX::NVCL;
else
drvInterface = NVPTX::CUDA;
// Provide the default CPU if none
std::string defCPU = "sm_20";

3
test/CodeGen/NVPTX/generic-to-nvvm.ll
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@ -1,6 +1,7 @@
; RUN: llc < %s -march=nvptx -mcpu=sm_20 -drvcuda | FileCheck %s
; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
target triple = "nvptx-nvidia-cuda"
; Ensure global variables in address space 0 are promoted to address space 1

4
test/CodeGen/NVPTX/i1-global.ll
View File

@ -1,7 +1,7 @@
; RUN: llc < %s -march=nvptx -mcpu=sm_20 -drvcuda | FileCheck %s
; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
target triple = "nvptx-nvidia-cuda"
; CHECK: .visible .global .align 1 .u8 mypred
@mypred = addrspace(1) global i1 true, align 1

3
test/CodeGen/NVPTX/i1-param.ll
View File

@ -1,6 +1,7 @@
; RUN: llc < %s -march=nvptx -mcpu=sm_20 -drvcuda | FileCheck %s
; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
target triple = "nvptx-nvidia-cuda"
; Make sure predicate (i1) operands to kernels get expanded out to .u8

4
test/CodeGen/NVPTX/load-sext-i1.ll
View File

@ -1,7 +1,7 @@
; RUN: llc < %s -march=nvptx -mcpu=sm_20 -drvcuda | FileCheck %s
; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
target triple = "nvptx-nvidia-cuda"
define void @main(i1* %a1, i32 %a2, i32* %arg3) {
; CHECK: ld.u8

4
test/CodeGen/NVPTX/refl1.ll
View File

@ -1,4 +1,6 @@
; RUN: llc < %s -march=nvptx -mcpu=sm_20 -drvcuda | FileCheck %s
; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s
target triple = "nvptx-nvidia-cuda"
; Function Attrs: nounwind
; CHECK: .entry foo