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Kill of TransferDeadFlag - Dead copies and subreg-to-reg instructions should
just be turned into kills on the spot. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175688 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -49,8 +49,6 @@ private:
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bool LowerSubregToReg(MachineInstr *MI);
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bool LowerCopy(MachineInstr *MI);
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void TransferDeadFlag(MachineInstr *MI, unsigned DstReg,
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const TargetRegisterInfo *TRI);
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void TransferImplicitDefs(MachineInstr *MI);
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};
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} // end anonymous namespace
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@ -61,21 +59,6 @@ char &llvm::ExpandPostRAPseudosID = ExpandPostRA::ID;
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INITIALIZE_PASS(ExpandPostRA, "postrapseudos",
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"Post-RA pseudo instruction expansion pass", false, false)
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/// TransferDeadFlag - MI is a pseudo-instruction with DstReg dead,
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/// and the lowered replacement instructions immediately precede it.
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/// Mark the replacement instructions with the dead flag.
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void
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ExpandPostRA::TransferDeadFlag(MachineInstr *MI, unsigned DstReg,
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const TargetRegisterInfo *TRI) {
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for (MachineBasicBlock::iterator MII =
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prior(MachineBasicBlock::iterator(MI)); ; --MII) {
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if (MII->addRegisterDead(DstReg, TRI))
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break;
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assert(MII != MI->getParent()->begin() &&
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"copyPhysReg output doesn't reference destination register!");
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}
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}
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/// TransferImplicitDefs - MI is a pseudo-instruction, and the lowered
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/// replacement instructions immediately precede it. Copy any implicit-def
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/// operands from MI to the replacement instruction.
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@ -128,17 +111,17 @@ bool ExpandPostRA::LowerSubregToReg(MachineInstr *MI) {
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}
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DEBUG(dbgs() << "subreg: eliminated!");
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} else {
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if (MI->getOperand(0).isDead()) {
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MI->setDesc(TII->get(TargetOpcode::KILL));
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DEBUG(dbgs() << "subreg: replaced by: " << *MI);
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return true;
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}
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TII->copyPhysReg(*MBB, MI, MI->getDebugLoc(), DstSubReg, InsReg,
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MI->getOperand(2).isKill());
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// Implicitly define DstReg for subsequent uses.
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MachineBasicBlock::iterator CopyMI = MI;
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--CopyMI;
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CopyMI->addRegisterDefined(DstReg);
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// Transfer the kill/dead flags, if needed.
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if (MI->getOperand(0).isDead())
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TransferDeadFlag(MI, DstSubReg, TRI);
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DEBUG(dbgs() << "subreg: " << *CopyMI);
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}
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@ -151,11 +134,18 @@ bool ExpandPostRA::LowerCopy(MachineInstr *MI) {
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MachineOperand &DstMO = MI->getOperand(0);
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MachineOperand &SrcMO = MI->getOperand(1);
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if (DstMO.isDead()) {
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DEBUG(dbgs() << "dead copy: " << *MI);
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MI->setDesc(TII->get(TargetOpcode::KILL));
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DEBUG(dbgs() << "replaced by: " << *MI);
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return true;
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}
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if (SrcMO.getReg() == DstMO.getReg()) {
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DEBUG(dbgs() << "identity copy: " << *MI);
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// No need to insert an identity copy instruction, but replace with a KILL
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// if liveness is changed.
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if (DstMO.isDead() || SrcMO.isUndef() || MI->getNumOperands() > 2) {
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if (SrcMO.isUndef() || MI->getNumOperands() > 2) {
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// We must make sure the super-register gets killed. Replace the
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// instruction with KILL.
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MI->setDesc(TII->get(TargetOpcode::KILL));
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@ -171,8 +161,6 @@ bool ExpandPostRA::LowerCopy(MachineInstr *MI) {
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TII->copyPhysReg(*MI->getParent(), MI, MI->getDebugLoc(),
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DstMO.getReg(), SrcMO.getReg(), SrcMO.isKill());
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if (DstMO.isDead())
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TransferDeadFlag(MI, DstMO.getReg(), TRI);
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if (MI->getNumOperands() > 2)
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TransferImplicitDefs(MI);
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DEBUG({
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