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Add a missing bitcast. This code used to only handle conversions between
i64 and f64 types, but now it also handle Neon vector types, so the f64 result of VMOVDRR may need to be converted to a Neon type. Radar 8084742. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105845 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2447,7 +2447,8 @@ static SDValue ExpandBIT_CONVERT(SDNode *N, SelectionDAG &DAG) {
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DAG.getConstant(0, MVT::i32));
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SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Op,
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DAG.getConstant(1, MVT::i32));
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return DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi);
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return DAG.getNode(ISD::BIT_CONVERT, dl, DstVT,
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DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi));
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}
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// Turn f64->i64 into VMOVRRD.
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19
test/CodeGen/ARM/2010-06-11-vmovdrr-bitcast.ll
Normal file
19
test/CodeGen/ARM/2010-06-11-vmovdrr-bitcast.ll
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@ -0,0 +1,19 @@
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; RUN: llc < %s -march=arm -mattr=+neon
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; Radar 8084742
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%struct.__int8x8x2_t = type { [2 x <8 x i8>] }
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define arm_apcscc void @foo(%struct.__int8x8x2_t* nocapture %a, i8* %b) nounwind {
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entry:
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%0 = bitcast %struct.__int8x8x2_t* %a to i128* ; <i128*> [#uses=1]
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%srcval = load i128* %0, align 8 ; <i128> [#uses=2]
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%tmp6 = trunc i128 %srcval to i64 ; <i64> [#uses=1]
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%tmp8 = lshr i128 %srcval, 64 ; <i128> [#uses=1]
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%tmp9 = trunc i128 %tmp8 to i64 ; <i64> [#uses=1]
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%tmp16.i = bitcast i64 %tmp6 to <8 x i8> ; <<8 x i8>> [#uses=1]
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%tmp20.i = bitcast i64 %tmp9 to <8 x i8> ; <<8 x i8>> [#uses=1]
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tail call void @llvm.arm.neon.vst2.v8i8(i8* %b, <8 x i8> %tmp16.i, <8 x i8> %tmp20.i) nounwind
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ret void
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}
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declare void @llvm.arm.neon.vst2.v8i8(i8*, <8 x i8>, <8 x i8>) nounwind
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