Add a missing bitcast. This code used to only handle conversions between

i64 and f64 types, but now it also handle Neon vector types, so the f64 result
of VMOVDRR may need to be converted to a Neon type.  Radar 8084742.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105845 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bob Wilson 2010-06-11 22:45:25 +00:00
parent 9a56c328b1
commit 1114f568bc
2 changed files with 21 additions and 1 deletions

View File

@ -2447,7 +2447,8 @@ static SDValue ExpandBIT_CONVERT(SDNode *N, SelectionDAG &DAG) {
DAG.getConstant(0, MVT::i32));
SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Op,
DAG.getConstant(1, MVT::i32));
return DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi);
return DAG.getNode(ISD::BIT_CONVERT, dl, DstVT,
DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi));
}
// Turn f64->i64 into VMOVRRD.

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@ -0,0 +1,19 @@
; RUN: llc < %s -march=arm -mattr=+neon
; Radar 8084742
%struct.__int8x8x2_t = type { [2 x <8 x i8>] }
define arm_apcscc void @foo(%struct.__int8x8x2_t* nocapture %a, i8* %b) nounwind {
entry:
%0 = bitcast %struct.__int8x8x2_t* %a to i128* ; <i128*> [#uses=1]
%srcval = load i128* %0, align 8 ; <i128> [#uses=2]
%tmp6 = trunc i128 %srcval to i64 ; <i64> [#uses=1]
%tmp8 = lshr i128 %srcval, 64 ; <i128> [#uses=1]
%tmp9 = trunc i128 %tmp8 to i64 ; <i64> [#uses=1]
%tmp16.i = bitcast i64 %tmp6 to <8 x i8> ; <<8 x i8>> [#uses=1]
%tmp20.i = bitcast i64 %tmp9 to <8 x i8> ; <<8 x i8>> [#uses=1]
tail call void @llvm.arm.neon.vst2.v8i8(i8* %b, <8 x i8> %tmp16.i, <8 x i8> %tmp20.i) nounwind
ret void
}
declare void @llvm.arm.neon.vst2.v8i8(i8*, <8 x i8>, <8 x i8>) nounwind