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Code clean up.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99319 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
2010-03-23 20:33:48 +00:00
parent df9a4f0591
commit 112e5e7eff
1 changed files with 6 additions and 6 deletions
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12
lib/CodeGen/MachineCSE.cpp
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@@ -117,17 +117,15 @@ bool MachineCSE::isPhysDefTriviallyDead(unsigned Reg,
MachineBasicBlock::const_iterator I, MachineBasicBlock::const_iterator I,
MachineBasicBlock::const_iterator E) { MachineBasicBlock::const_iterator E) {
unsigned LookAheadLeft = 5; unsigned LookAheadLeft = 5;
while (LookAheadLeft--) { while (LookAheadLeft) {
if (I == E) if (I == E)
// Reached end of block, register is obviously dead. // Reached end of block, register is obviously dead.
return true; return true;
if (I->isDebugValue()) { // Skip over dbg_value's.
// These must not count against the limit. while (I->isDebugValue())
++LookAheadLeft;
++I; ++I;
continue;
}
bool SeenDef = false; bool SeenDef = false;
for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) { for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) {
const MachineOperand &MO = I->getOperand(i); const MachineOperand &MO = I->getOperand(i);
@@ -143,6 +141,8 @@ bool MachineCSE::isPhysDefTriviallyDead(unsigned Reg,
// See a def of Reg (or an alias) before encountering any use, it's // See a def of Reg (or an alias) before encountering any use, it's
// trivially dead. // trivially dead.
return true; return true;
--LookAheadLeft;
++I; ++I;
} }
return false; return false;