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begining alpha subtarget support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23531 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -13,6 +13,7 @@
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#include "Alpha.h"
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#include "AlphaRegisterInfo.h"
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#include "AlphaTargetMachine.h"
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#include "AlphaISelLowering.h"
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#include "llvm/Constants.h" // FIXME: REMOVE
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#include "llvm/Function.h"
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@ -38,12 +39,6 @@ namespace llvm {
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cl::opt<bool> EnableAlphaIDIV("enable-alpha-intfpdiv",
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cl::desc("Use the FP div instruction for integer div when possible"),
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cl::Hidden);
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cl::opt<bool> EnableAlphaFTOI("enable-alpha-FTOI",
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cl::desc("Enable use of ftoi* and itof* instructions (ev6 and higher)"),
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cl::Hidden);
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cl::opt<bool> EnableAlphaCT("enable-alpha-CT",
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cl::desc("Enable use of the ctpop, ctlz, and cttz instructions"),
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cl::Hidden);
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cl::opt<bool> EnableAlphaCount("enable-alpha-count",
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cl::desc("Print estimates on live ins and outs"),
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cl::Hidden);
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@ -428,7 +423,7 @@ static unsigned GetRelVersion(unsigned opcode)
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void AlphaISel::MoveFP2Int(unsigned src, unsigned dst, bool isDouble)
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{
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unsigned Opc;
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if (EnableAlphaFTOI) {
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if (TLI.getTargetMachine().getSubtarget<AlphaSubtarget>().hasF2I()) {
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Opc = isDouble ? Alpha::FTOIT : Alpha::FTOIS;
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BuildMI(BB, Opc, 1, dst).addReg(src).addReg(Alpha::F31);
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} else {
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@ -455,7 +450,7 @@ void AlphaISel::MoveFP2Int(unsigned src, unsigned dst, bool isDouble)
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void AlphaISel::MoveInt2FP(unsigned src, unsigned dst, bool isDouble)
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{
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unsigned Opc;
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if (EnableAlphaFTOI) {
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if (TLI.getTargetMachine().getSubtarget<AlphaSubtarget>().hasF2I()) {
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Opc = isDouble?Alpha::ITOFT:Alpha::ITOFS;
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BuildMI(BB, Opc, 1, dst).addReg(src).addReg(Alpha::R31);
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} else {
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