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Reenable tests

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93555 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Anton Korobeynikov
2010-01-15 21:19:26 +00:00
parent 702adaba6d
commit 12c71a53b5
2 changed files with 6 additions and 8 deletions
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1
test/CodeGen/MSP430/bit.ll
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@@ -1,5 +1,4 @@
; RUN: llvm-as < %s | llc -march=msp430 | FileCheck %s ; RUN: llvm-as < %s | llc -march=msp430 | FileCheck %s
; XFAIL: *
target datalayout = "e-p:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:16:32" target datalayout = "e-p:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:16:32"
target triple = "msp430-generic-generic" target triple = "msp430-generic-generic"

13
test/CodeGen/MSP430/setcc.ll
View File

@@ -1,5 +1,4 @@
; RUN: llc -march=msp430 < %s | FileCheck %s ; RUN: llc -march=msp430 < %s | FileCheck %s
; XFAIL: *
target datalayout = "e-p:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:16:32" target datalayout = "e-p:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:16:32"
target triple = "msp430-generic-generic" target triple = "msp430-generic-generic"
@@ -32,7 +31,7 @@ define i16 @sccwne(i16 %a, i16 %b) nounwind {
ret i16 %t2 ret i16 %t2
} }
; CHECK:sccwne: ; CHECK:sccwne:
; CHECK: cmp.w r15, r14 ; CHECK: cmp.w r14, r15
; CHECK-NEXT: mov.w r2, r15 ; CHECK-NEXT: mov.w r2, r15
; CHECK-NEXT: rra.w r15 ; CHECK-NEXT: rra.w r15
; CHECK-NEXT: and.w #1, r15 ; CHECK-NEXT: and.w #1, r15
@@ -43,7 +42,7 @@ define i16 @sccweq(i16 %a, i16 %b) nounwind {
ret i16 %t2 ret i16 %t2
} }
; CHECK:sccweq: ; CHECK:sccweq:
; CHECK: cmp.w r15, r14 ; CHECK: cmp.w r14, r15
; CHECK-NEXT: mov.w r2, r15 ; CHECK-NEXT: mov.w r2, r15
; CHECK-NEXT: rra.w r15 ; CHECK-NEXT: rra.w r15
; CHECK-NEXT: and.w #1, r15 ; CHECK-NEXT: and.w #1, r15
@@ -55,7 +54,7 @@ define i16 @sccwugt(i16 %a, i16 %b) nounwind {
ret i16 %t2 ret i16 %t2
} }
; CHECK:sccwugt: ; CHECK:sccwugt:
; CHECK: cmp.w r14, r15 ; CHECK: cmp.w r15, r14
; CHECK-NEXT: mov.w r2, r15 ; CHECK-NEXT: mov.w r2, r15
; CHECK-NEXT: and.w #1, r15 ; CHECK-NEXT: and.w #1, r15
; CHECK-NEXT: xor.w #1, r15 ; CHECK-NEXT: xor.w #1, r15
@@ -66,7 +65,7 @@ define i16 @sccwuge(i16 %a, i16 %b) nounwind {
ret i16 %t2 ret i16 %t2
} }
; CHECK:sccwuge: ; CHECK:sccwuge:
; CHECK: cmp.w r15, r14 ; CHECK: cmp.w r14, r15
; CHECK-NEXT: mov.w r2, r15 ; CHECK-NEXT: mov.w r2, r15
; CHECK-NEXT: and.w #1, r15 ; CHECK-NEXT: and.w #1, r15
@@ -76,7 +75,7 @@ define i16 @sccwult(i16 %a, i16 %b) nounwind {
ret i16 %t2 ret i16 %t2
} }
; CHECK:sccwult: ; CHECK:sccwult:
; CHECK: cmp.w r15, r14 ; CHECK: cmp.w r14, r15
; CHECK-NEXT: mov.w r2, r15 ; CHECK-NEXT: mov.w r2, r15
; CHECK-NEXT: and.w #1, r15 ; CHECK-NEXT: and.w #1, r15
; CHECK-NEXT: xor.w #1, r15 ; CHECK-NEXT: xor.w #1, r15
@@ -87,7 +86,7 @@ define i16 @sccwule(i16 %a, i16 %b) nounwind {
ret i16 %t2 ret i16 %t2
} }
; CHECK:sccwule: ; CHECK:sccwule:
; CHECK: cmp.w r14, r15 ; CHECK: cmp.w r15, r14
; CHECK-NEXT: mov.w r2, r15 ; CHECK-NEXT: mov.w r2, r15
; CHECK-NEXT: and.w #1, r15 ; CHECK-NEXT: and.w #1, r15