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[PowerPC] Support all condition register logical instructions

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This adds support for all missing condition register logical
instructions and extended mnemonics to the asm parser.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185387 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Ulrich Weigand 2013-07-01 21:40:54 +00:00
parent bde84a96ea
commit 1307d8300f
3 changed files with 54 additions and 12 deletions
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37
lib/Target/PowerPC/PPCInstrInfo.td
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@ -1776,15 +1776,37 @@ def MCRF : XLForm_3<19, 0, (outs crrc:$BF), (ins crrc:$BFA),
"mcrf $BF, $BFA", BrMCR>,
PPC970_DGroup_First, PPC970_Unit_CRU;
def CRAND : XLForm_1<19, 257, (outs crbitrc:$CRD),
(ins crbitrc:$CRA, crbitrc:$CRB),
"crand $CRD, $CRA, $CRB", BrCR, []>;
def CRNAND : XLForm_1<19, 225, (outs crbitrc:$CRD),
(ins crbitrc:$CRA, crbitrc:$CRB),
"crnand $CRD, $CRA, $CRB", BrCR, []>;
def CROR : XLForm_1<19, 449, (outs crbitrc:$CRD),
(ins crbitrc:$CRA, crbitrc:$CRB),
"cror $CRD, $CRA, $CRB", BrCR, []>;
def CRXOR : XLForm_1<19, 193, (outs crbitrc:$CRD),
(ins crbitrc:$CRA, crbitrc:$CRB),
"crxor $CRD, $CRA, $CRB", BrCR, []>;
def CRNOR : XLForm_1<19, 33, (outs crbitrc:$CRD),
(ins crbitrc:$CRA, crbitrc:$CRB),
"crnor $CRD, $CRA, $CRB", BrCR, []>;
def CREQV : XLForm_1<19, 289, (outs crbitrc:$CRD),
(ins crbitrc:$CRA, crbitrc:$CRB),
"creqv $CRD, $CRA, $CRB", BrCR,
[]>;
"creqv $CRD, $CRA, $CRB", BrCR, []>;
def CROR : XLForm_1<19, 449, (outs crbitrc:$CRD),
def CRANDC : XLForm_1<19, 129, (outs crbitrc:$CRD),
(ins crbitrc:$CRA, crbitrc:$CRB),
"cror $CRD, $CRA, $CRB", BrCR,
[]>;
"crandc $CRD, $CRA, $CRB", BrCR, []>;
def CRORC : XLForm_1<19, 417, (outs crbitrc:$CRD),
(ins crbitrc:$CRA, crbitrc:$CRB),
"crorc $CRD, $CRA, $CRB", BrCR, []>;
let isCodeGenOnly = 1 in {
def CRSET : XLForm_1_ext<19, 289, (outs crbitrc:$dst), (ins),
@ -2294,6 +2316,11 @@ def : InstAlias<"wait", (WAIT 0)>;
def : InstAlias<"waitrsv", (WAIT 1)>;
def : InstAlias<"waitimpl", (WAIT 2)>;
def : InstAlias<"crset $bx", (CREQV crbitrc:$bx, crbitrc:$bx, crbitrc:$bx)>;
def : InstAlias<"crclr $bx", (CRXOR crbitrc:$bx, crbitrc:$bx, crbitrc:$bx)>;
def : InstAlias<"crmove $bx, $by", (CROR crbitrc:$bx, crbitrc:$by, crbitrc:$by)>;
def : InstAlias<"crnot $bx, $by", (CRNOR crbitrc:$bx, crbitrc:$by, crbitrc:$by)>;
def : InstAlias<"xnop", (XORI R0, R0, 0)>;
def : InstAlias<"mr $rA, $rB", (OR8 g8rc:$rA, g8rc:$rB, g8rc:$rB)>;

11
test/MC/PowerPC/ppc64-encoding-ext.s
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@ -1786,7 +1786,16 @@
# CHECK: bnuctrl- 0 # encoding: [0x4c,0xc3,0x04,0x21]
bnuctrl-
# FIXME: Condition register logical mnemonics
# Condition register logical mnemonics
# CHECK: creqv 2, 2, 2 # encoding: [0x4c,0x42,0x12,0x42]
crset 2
# CHECK: crxor 2, 2, 2 # encoding: [0x4c,0x42,0x11,0x82]
crclr 2
# CHECK: cror 2, 3, 3 # encoding: [0x4c,0x43,0x1b,0x82]
crmove 2, 3
# CHECK: crnor 2, 3, 3 # encoding: [0x4c,0x43,0x18,0x42]
crnot 2, 3
# Subtract mnemonics

18
test/MC/PowerPC/ppc64-encoding.s
View File

@ -50,16 +50,22 @@
# Condition register instructions
# FIXME: crand 2, 3, 4
# FIXME: crnand 2, 3, 4
# CHECK: crand 2, 3, 4 # encoding: [0x4c,0x43,0x22,0x02]
crand 2, 3, 4
# CHECK: crnand 2, 3, 4 # encoding: [0x4c,0x43,0x21,0xc2]
crnand 2, 3, 4
# CHECK: cror 2, 3, 4 # encoding: [0x4c,0x43,0x23,0x82]
cror 2, 3, 4
# FIXME: crxor 2, 3, 4
# FIXME: crnor 2, 3, 4
# CHECK: crxor 2, 3, 4 # encoding: [0x4c,0x43,0x21,0x82]
crxor 2, 3, 4
# CHECK: crnor 2, 3, 4 # encoding: [0x4c,0x43,0x20,0x42]
crnor 2, 3, 4
# CHECK: creqv 2, 3, 4 # encoding: [0x4c,0x43,0x22,0x42]
creqv 2, 3, 4
# FIXME: crandc 2, 3, 4
# FIXME: crorc 2, 3, 4
# CHECK: crandc 2, 3, 4 # encoding: [0x4c,0x43,0x21,0x02]
crandc 2, 3, 4
# CHECK: crorc 2, 3, 4 # encoding: [0x4c,0x43,0x23,0x42]
crorc 2, 3, 4
# CHECK: mcrf 2, 3 # encoding: [0x4d,0x0c,0x00,0x00]
mcrf 2, 3