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isStoreToStackSlot
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25925 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -61,3 +61,21 @@ AlphaInstrInfo::isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const {
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return 0;
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return 0;
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}
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}
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unsigned
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AlphaInstrInfo::isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const {
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switch (MI->getOpcode()) {
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case Alpha::STL:
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case Alpha::STQ:
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case Alpha::STB:
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case Alpha::STW:
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case Alpha::STS:
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case Alpha::STT:
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if (MI->getOperand(1).isFrameIndex()) {
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FrameIndex = MI->getOperand(1).getFrameIndex();
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return MI->getOperand(0).getReg();
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}
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break;
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}
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return 0;
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}
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@ -37,6 +37,7 @@ public:
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unsigned &SrcReg, unsigned &DstReg) const;
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unsigned &SrcReg, unsigned &DstReg) const;
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virtual unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const;
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virtual unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const;
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virtual unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const;
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};
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};
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}
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}
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@ -177,9 +177,7 @@ def CMOVLBSi : OForm4L< 0x11, 0x14, "cmovlbs $RCOND,$RTRUE,$RDEST",
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[(set GPRC:$RDEST, (select (xor GPRC:$RCOND, 1), GPRC:$RFALSE, immUExt8:$RTRUE))]>;
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[(set GPRC:$RDEST, (select (xor GPRC:$RCOND, 1), GPRC:$RFALSE, immUExt8:$RTRUE))]>;
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//FIXME: fold setcc with select for all cases. clearly I need patterns for inverted conditions
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//General pattern for cmov
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// and constants (which require inverted conditions as legalize puts the constant in the
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// wrong field for the instruction definition
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def : Pat<(select GPRC:$which, GPRC:$src1, GPRC:$src2),
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def : Pat<(select GPRC:$which, GPRC:$src1, GPRC:$src2),
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(CMOVNE GPRC:$src2, GPRC:$src1, GPRC:$which)>;
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(CMOVNE GPRC:$src2, GPRC:$src1, GPRC:$which)>;
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def : Pat<(select GPRC:$which, GPRC:$src1, immUExt8:$src2),
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def : Pat<(select GPRC:$which, GPRC:$src1, immUExt8:$src2),
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