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https://github.com/c64scene-ar/llvm-6502.git
synced 2024-11-01 15:11:24 +00:00
Move the ARM reloc constants to Support/ELF.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120035 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -289,6 +289,144 @@ enum {
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R_MICROBLAZE_COPY = 21
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};
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// ELF Relocation types for ARM
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// Meets 2.08 ABI Specs.
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enum {
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R_ARM_NONE = 0x00,
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R_ARM_PC24 = 0x01,
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R_ARM_ABS32 = 0x02,
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R_ARM_REL32 = 0x03,
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R_ARM_LDR_PC_G0 = 0x04,
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R_ARM_ABS16 = 0x05,
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R_ARM_ABS12 = 0x06,
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R_ARM_THM_ABS5 = 0x07,
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R_ARM_ABS8 = 0x08,
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R_ARM_SBREL32 = 0x09,
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R_ARM_THM_CALL = 0x0a,
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R_ARM_THM_PC8 = 0x0b,
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R_ARM_BREL_ADJ = 0x0c,
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R_ARM_TLS_DESC = 0x0d,
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R_ARM_THM_SWI8 = 0x0e,
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R_ARM_XPC25 = 0x0f,
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R_ARM_THM_XPC22 = 0x10,
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R_ARM_TLS_DTPMOD32 = 0x11,
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R_ARM_TLS_DTPOFF32 = 0x12,
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R_ARM_TLS_TPOFF32 = 0x13,
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R_ARM_COPY = 0x14,
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R_ARM_GLOB_DAT = 0x15,
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R_ARM_JUMP_SLOT = 0x16,
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R_ARM_RELATIVE = 0x17,
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R_ARM_GOTOFF32 = 0x18,
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R_ARM_BASE_PREL = 0x19,
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R_ARM_GOT_BREL = 0x1a,
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R_ARM_PLT32 = 0x1b,
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R_ARM_CALL = 0x1c,
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R_ARM_JUMP24 = 0x1d,
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R_ARM_THM_JUMP24 = 0x1e,
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R_ARM_BASE_ABS = 0x1f,
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R_ARM_ALU_PCREL_7_0 = 0x20,
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R_ARM_ALU_PCREL_15_8 = 0x21,
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R_ARM_ALU_PCREL_23_15 = 0x22,
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R_ARM_LDR_SBREL_11_0_NC = 0x23,
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R_ARM_ALU_SBREL_19_12_NC = 0x24,
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R_ARM_ALU_SBREL_27_20_CK = 0x25,
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R_ARM_TARGET1 = 0x26,
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R_ARM_SBREL31 = 0x27,
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R_ARM_V4BX = 0x28,
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R_ARM_TARGET2 = 0x29,
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R_ARM_PREL31 = 0x2a,
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R_ARM_MOVW_ABS_NC = 0x2b,
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R_ARM_MOVT_ABS = 0x2c,
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R_ARM_MOVW_PREL_NC = 0x2d,
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R_ARM_MOVT_PREL = 0x2e,
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R_ARM_THM_MOVW_ABS_NC = 0x2f,
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R_ARM_THM_MOVT_ABS = 0x30,
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R_ARM_THM_MOVW_PREL_NC = 0x31,
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R_ARM_THM_MOVT_PREL = 0x32,
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R_ARM_THM_JUMP19 = 0x33,
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R_ARM_THM_JUMP6 = 0x34,
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R_ARM_THM_ALU_PREL_11_0 = 0x35,
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R_ARM_THM_PC12 = 0x36,
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R_ARM_ABS32_NOI = 0x37,
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R_ARM_REL32_NOI = 0x38,
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R_ARM_ALU_PC_G0_NC = 0x39,
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R_ARM_ALU_PC_G0 = 0x3a,
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R_ARM_ALU_PC_G1_NC = 0x3b,
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R_ARM_ALU_PC_G1 = 0x3c,
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R_ARM_ALU_PC_G2 = 0x3d,
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R_ARM_LDR_PC_G1 = 0x3e,
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R_ARM_LDR_PC_G2 = 0x3f,
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R_ARM_LDRS_PC_G0 = 0x40,
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R_ARM_LDRS_PC_G1 = 0x41,
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R_ARM_LDRS_PC_G2 = 0x42,
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R_ARM_LDC_PC_G0 = 0x43,
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R_ARM_LDC_PC_G1 = 0x44,
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R_ARM_LDC_PC_G2 = 0x45,
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R_ARM_ALU_SB_G0_NC = 0x46,
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R_ARM_ALU_SB_G0 = 0x47,
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R_ARM_ALU_SB_G1_NC = 0x48,
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R_ARM_ALU_SB_G1 = 0x49,
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R_ARM_ALU_SB_G2 = 0x4a,
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R_ARM_LDR_SB_G0 = 0x4b,
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R_ARM_LDR_SB_G1 = 0x4c,
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R_ARM_LDR_SB_G2 = 0x4d,
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R_ARM_LDRS_SB_G0 = 0x4e,
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R_ARM_LDRS_SB_G1 = 0x4f,
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R_ARM_LDRS_SB_G2 = 0x50,
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R_ARM_LDC_SB_G0 = 0x51,
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R_ARM_LDC_SB_G1 = 0x52,
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R_ARM_LDC_SB_G2 = 0x53,
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R_ARM_MOVW_BREL_NC = 0x54,
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R_ARM_MOVT_BREL = 0x55,
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R_ARM_MOVW_BREL = 0x56,
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R_ARM_THM_MOVW_BREL_NC = 0x57,
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R_ARM_THM_MOVT_BREL = 0x58,
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R_ARM_THM_MOVW_BREL = 0x59,
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R_ARM_TLS_GOTDESC = 0x5a,
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R_ARM_TLS_CALL = 0x5b,
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R_ARM_TLS_DESCSEQ = 0x5c,
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R_ARM_THM_TLS_CALL = 0x5d,
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R_ARM_PLT32_ABS = 0x5e,
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R_ARM_GOT_ABS = 0x5f,
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R_ARM_GOT_PREL = 0x60,
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R_ARM_GOT_BREL12 = 0x61,
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R_ARM_GOTOFF12 = 0x62,
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R_ARM_GOTRELAX = 0x63,
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R_ARM_GNU_VTENTRY = 0x64,
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R_ARM_GNU_VTINHERIT = 0x65,
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R_ARM_THM_JUMP11 = 0x66,
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R_ARM_THM_JUMP8 = 0x67,
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R_ARM_TLS_GD32 = 0x68,
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R_ARM_TLS_LDM32 = 0x69,
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R_ARM_TLS_LDO32 = 0x6a,
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R_ARM_TLS_IE32 = 0x6b,
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R_ARM_TLS_LE32 = 0x6c,
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R_ARM_TLS_LDO12 = 0x6d,
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R_ARM_TLS_LE12 = 0x6e,
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R_ARM_TLS_IE12GP = 0x6f,
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R_ARM_PRIVATE_0 = 0x70,
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R_ARM_PRIVATE_1 = 0x71,
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R_ARM_PRIVATE_2 = 0x72,
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R_ARM_PRIVATE_3 = 0x73,
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R_ARM_PRIVATE_4 = 0x74,
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R_ARM_PRIVATE_5 = 0x75,
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R_ARM_PRIVATE_6 = 0x76,
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R_ARM_PRIVATE_7 = 0x77,
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R_ARM_PRIVATE_8 = 0x78,
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R_ARM_PRIVATE_9 = 0x79,
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R_ARM_PRIVATE_10 = 0x7a,
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R_ARM_PRIVATE_11 = 0x7b,
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R_ARM_PRIVATE_12 = 0x7c,
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R_ARM_PRIVATE_13 = 0x7d,
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R_ARM_PRIVATE_14 = 0x7e,
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R_ARM_PRIVATE_15 = 0x7f,
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R_ARM_ME_TOO = 0x80,
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R_ARM_THM_TLS_DESCSEQ16 = 0x81,
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R_ARM_THM_TLS_DESCSEQ32 = 0x82
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};
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// Section header.
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struct Elf32_Shdr {
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@ -17,6 +17,7 @@
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Target/TargetData.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Support/ELF.h"
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using namespace llvm;
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@ -42,9 +43,9 @@ unsigned ARMELFWriterInfo::getRelocationType(unsigned MachineRelTy) const {
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case ARM::reloc_arm_pic_jt:
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assert(0 && "unsupported ARM relocation type"); break;
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case ARM::reloc_arm_branch: return R_ARM_CALL; break;
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case ARM::reloc_arm_movt: return R_ARM_MOVT_ABS; break;
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case ARM::reloc_arm_movw: return R_ARM_MOVW_ABS_NC; break;
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case ARM::reloc_arm_branch: return ELF::R_ARM_CALL; break;
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case ARM::reloc_arm_movt: return ELF::R_ARM_MOVT_ABS; break;
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case ARM::reloc_arm_movw: return ELF::R_ARM_MOVW_ABS_NC; break;
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default:
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llvm_unreachable("unknown ARM relocation type"); break;
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}
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@ -19,145 +19,6 @@
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namespace llvm {
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class ARMELFWriterInfo : public TargetELFWriterInfo {
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// ELF Relocation types for ARM
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// Meets 2.08 ABI Specs. Most of these are not used by the assembler.
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// They are here for completeness's sake
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enum ARMRelocationType {
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R_ARM_NONE = 0x00,
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R_ARM_PC24 = 0x01,
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R_ARM_ABS32 = 0x02,
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R_ARM_REL32 = 0x03,
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R_ARM_LDR_PC_G0 = 0x04,
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R_ARM_ABS16 = 0x05,
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R_ARM_ABS12 = 0x06,
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R_ARM_THM_ABS5 = 0x07,
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R_ARM_ABS8 = 0x08,
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R_ARM_SBREL32 = 0x09,
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R_ARM_THM_CALL = 0x0a,
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R_ARM_THM_PC8 = 0x0b,
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R_ARM_BREL_ADJ = 0x0c,
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R_ARM_TLS_DESC = 0x0d,
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R_ARM_THM_SWI8 = 0x0e,
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R_ARM_XPC25 = 0x0f,
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R_ARM_THM_XPC22 = 0x10,
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R_ARM_TLS_DTPMOD32 = 0x11,
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R_ARM_TLS_DTPOFF32 = 0x12,
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R_ARM_TLS_TPOFF32 = 0x13,
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R_ARM_COPY = 0x14,
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R_ARM_GLOB_DAT = 0x15,
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R_ARM_JUMP_SLOT = 0x16,
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R_ARM_RELATIVE = 0x17,
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R_ARM_GOTOFF32 = 0x18,
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R_ARM_BASE_PREL = 0x19,
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R_ARM_GOT_BREL = 0x1a,
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R_ARM_PLT32 = 0x1b,
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R_ARM_CALL = 0x1c,
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R_ARM_JUMP24 = 0x1d,
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R_ARM_THM_JUMP24 = 0x1e,
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R_ARM_BASE_ABS = 0x1f,
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R_ARM_ALU_PCREL_7_0 = 0x20,
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R_ARM_ALU_PCREL_15_8 = 0x21,
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R_ARM_ALU_PCREL_23_15 = 0x22,
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R_ARM_LDR_SBREL_11_0_NC = 0x23,
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R_ARM_ALU_SBREL_19_12_NC = 0x24,
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R_ARM_ALU_SBREL_27_20_CK = 0x25,
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R_ARM_TARGET1 = 0x26,
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R_ARM_SBREL31 = 0x27,
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R_ARM_V4BX = 0x28,
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R_ARM_TARGET2 = 0x29,
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R_ARM_PREL31 = 0x2a,
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R_ARM_MOVW_ABS_NC = 0x2b,
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R_ARM_MOVT_ABS = 0x2c,
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R_ARM_MOVW_PREL_NC = 0x2d,
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R_ARM_MOVT_PREL = 0x2e,
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R_ARM_THM_MOVW_ABS_NC = 0x2f,
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R_ARM_THM_MOVT_ABS = 0x30,
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R_ARM_THM_MOVW_PREL_NC = 0x31,
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R_ARM_THM_MOVT_PREL = 0x32,
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R_ARM_THM_JUMP19 = 0x33,
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R_ARM_THM_JUMP6 = 0x34,
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R_ARM_THM_ALU_PREL_11_0 = 0x35,
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R_ARM_THM_PC12 = 0x36,
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R_ARM_ABS32_NOI = 0x37,
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R_ARM_REL32_NOI = 0x38,
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R_ARM_ALU_PC_G0_NC = 0x39,
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R_ARM_ALU_PC_G0 = 0x3a,
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R_ARM_ALU_PC_G1_NC = 0x3b,
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R_ARM_ALU_PC_G1 = 0x3c,
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R_ARM_ALU_PC_G2 = 0x3d,
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R_ARM_LDR_PC_G1 = 0x3e,
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R_ARM_LDR_PC_G2 = 0x3f,
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R_ARM_LDRS_PC_G0 = 0x40,
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R_ARM_LDRS_PC_G1 = 0x41,
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R_ARM_LDRS_PC_G2 = 0x42,
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R_ARM_LDC_PC_G0 = 0x43,
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R_ARM_LDC_PC_G1 = 0x44,
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R_ARM_LDC_PC_G2 = 0x45,
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R_ARM_ALU_SB_G0_NC = 0x46,
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R_ARM_ALU_SB_G0 = 0x47,
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R_ARM_ALU_SB_G1_NC = 0x48,
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R_ARM_ALU_SB_G1 = 0x49,
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R_ARM_ALU_SB_G2 = 0x4a,
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R_ARM_LDR_SB_G0 = 0x4b,
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R_ARM_LDR_SB_G1 = 0x4c,
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R_ARM_LDR_SB_G2 = 0x4d,
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R_ARM_LDRS_SB_G0 = 0x4e,
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R_ARM_LDRS_SB_G1 = 0x4f,
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R_ARM_LDRS_SB_G2 = 0x50,
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R_ARM_LDC_SB_G0 = 0x51,
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R_ARM_LDC_SB_G1 = 0x52,
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R_ARM_LDC_SB_G2 = 0x53,
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R_ARM_MOVW_BREL_NC = 0x54,
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R_ARM_MOVT_BREL = 0x55,
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R_ARM_MOVW_BREL = 0x56,
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R_ARM_THM_MOVW_BREL_NC = 0x57,
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R_ARM_THM_MOVT_BREL = 0x58,
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R_ARM_THM_MOVW_BREL = 0x59,
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R_ARM_TLS_GOTDESC = 0x5a,
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R_ARM_TLS_CALL = 0x5b,
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R_ARM_TLS_DESCSEQ = 0x5c,
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R_ARM_THM_TLS_CALL = 0x5d,
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R_ARM_PLT32_ABS = 0x5e,
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R_ARM_GOT_ABS = 0x5f,
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R_ARM_GOT_PREL = 0x60,
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R_ARM_GOT_BREL12 = 0x61,
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R_ARM_GOTOFF12 = 0x62,
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R_ARM_GOTRELAX = 0x63,
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R_ARM_GNU_VTENTRY = 0x64,
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R_ARM_GNU_VTINHERIT = 0x65,
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R_ARM_THM_JUMP11 = 0x66,
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R_ARM_THM_JUMP8 = 0x67,
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R_ARM_TLS_GD32 = 0x68,
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R_ARM_TLS_LDM32 = 0x69,
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R_ARM_TLS_LDO32 = 0x6a,
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R_ARM_TLS_IE32 = 0x6b,
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R_ARM_TLS_LE32 = 0x6c,
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R_ARM_TLS_LDO12 = 0x6d,
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R_ARM_TLS_LE12 = 0x6e,
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R_ARM_TLS_IE12GP = 0x6f,
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R_ARM_PRIVATE_0 = 0x70,
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R_ARM_PRIVATE_1 = 0x71,
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R_ARM_PRIVATE_2 = 0x72,
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R_ARM_PRIVATE_3 = 0x73,
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R_ARM_PRIVATE_4 = 0x74,
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R_ARM_PRIVATE_5 = 0x75,
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R_ARM_PRIVATE_6 = 0x76,
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R_ARM_PRIVATE_7 = 0x77,
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R_ARM_PRIVATE_8 = 0x78,
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R_ARM_PRIVATE_9 = 0x79,
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R_ARM_PRIVATE_10 = 0x7a,
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R_ARM_PRIVATE_11 = 0x7b,
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R_ARM_PRIVATE_12 = 0x7c,
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R_ARM_PRIVATE_13 = 0x7d,
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R_ARM_PRIVATE_14 = 0x7e,
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R_ARM_PRIVATE_15 = 0x7f,
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R_ARM_ME_TOO = 0x80,
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R_ARM_THM_TLS_DESCSEQ16 = 0x81,
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R_ARM_THM_TLS_DESCSEQ32 = 0x82
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};
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public:
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ARMELFWriterInfo(TargetMachine &TM);
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virtual ~ARMELFWriterInfo();
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