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https://github.com/c64scene-ar/llvm-6502.git
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Commoning of target specific load/store intrinsics in Early CSE.
Phabricator revision: http://reviews.llvm.org/D7121 Patch by Sanjin Sijaric <ssijaric@codeaurora.org>! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227149 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -44,6 +44,12 @@ class AArch64TTI final : public ImmutablePass, public TargetTransformInfo {
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/// are set if the result needs to be inserted and/or extracted from vectors.
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unsigned getScalarizationOverhead(Type *Ty, bool Insert, bool Extract) const;
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enum MemIntrinsicType {
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VECTOR_LDST_TWO_ELEMENTS,
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VECTOR_LDST_THREE_ELEMENTS,
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VECTOR_LDST_FOUR_ELEMENTS
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};
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public:
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AArch64TTI() : ImmutablePass(ID), TM(nullptr), ST(nullptr), TLI(nullptr) {
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llvm_unreachable("This pass cannot be directly constructed");
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@@ -131,6 +137,11 @@ public:
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void getUnrollingPreferences(const Function *F, Loop *L,
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UnrollingPreferences &UP) const override;
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Value *getOrCreateResultFromMemIntrinsic(IntrinsicInst *Inst,
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Type *ExpectedType) const override;
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bool getTgtMemIntrinsic(IntrinsicInst *Inst,
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MemIntrinsicInfo &Info) const override;
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/// @}
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};
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@@ -554,3 +565,83 @@ void AArch64TTI::getUnrollingPreferences(const Function *F, Loop *L,
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// Disable partial & runtime unrolling on -Os.
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UP.PartialOptSizeThreshold = 0;
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}
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Value *AArch64TTI::getOrCreateResultFromMemIntrinsic(IntrinsicInst *Inst,
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Type *ExpectedType) const {
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switch (Inst->getIntrinsicID()) {
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default:
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return nullptr;
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case Intrinsic::aarch64_neon_st2:
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case Intrinsic::aarch64_neon_st3:
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case Intrinsic::aarch64_neon_st4: {
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// Create a struct type
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StructType *ST = dyn_cast<StructType>(ExpectedType);
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if (!ST)
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return nullptr;
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unsigned NumElts = Inst->getNumArgOperands() - 1;
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if (ST->getNumElements() != NumElts)
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return nullptr;
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for (unsigned i = 0, e = NumElts; i != e; ++i) {
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if (Inst->getArgOperand(i)->getType() != ST->getElementType(i))
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return nullptr;
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}
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Value *Res = UndefValue::get(ExpectedType);
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IRBuilder<> Builder(Inst);
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for (unsigned i = 0, e = NumElts; i != e; ++i) {
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Value *L = Inst->getArgOperand(i);
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Res = Builder.CreateInsertValue(Res, L, i);
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}
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return Res;
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}
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case Intrinsic::aarch64_neon_ld2:
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case Intrinsic::aarch64_neon_ld3:
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case Intrinsic::aarch64_neon_ld4:
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if (Inst->getType() == ExpectedType)
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return Inst;
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return nullptr;
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}
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}
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bool AArch64TTI::getTgtMemIntrinsic(IntrinsicInst *Inst,
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MemIntrinsicInfo &Info) const {
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switch (Inst->getIntrinsicID()) {
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default:
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break;
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case Intrinsic::aarch64_neon_ld2:
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case Intrinsic::aarch64_neon_ld3:
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case Intrinsic::aarch64_neon_ld4:
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Info.ReadMem = true;
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Info.WriteMem = false;
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Info.Vol = false;
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Info.NumMemRefs = 1;
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Info.PtrVal = Inst->getArgOperand(0);
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break;
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case Intrinsic::aarch64_neon_st2:
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case Intrinsic::aarch64_neon_st3:
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case Intrinsic::aarch64_neon_st4:
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Info.ReadMem = false;
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Info.WriteMem = true;
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Info.Vol = false;
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Info.NumMemRefs = 1;
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Info.PtrVal = Inst->getArgOperand(Inst->getNumArgOperands() - 1);
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break;
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}
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switch (Inst->getIntrinsicID()) {
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default:
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return false;
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case Intrinsic::aarch64_neon_ld2:
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case Intrinsic::aarch64_neon_st2:
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Info.MatchingId = VECTOR_LDST_TWO_ELEMENTS;
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break;
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case Intrinsic::aarch64_neon_ld3:
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case Intrinsic::aarch64_neon_st3:
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Info.MatchingId = VECTOR_LDST_THREE_ELEMENTS;
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break;
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case Intrinsic::aarch64_neon_ld4:
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case Intrinsic::aarch64_neon_st4:
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Info.MatchingId = VECTOR_LDST_FOUR_ELEMENTS;
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break;
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}
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return true;
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}
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