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LDCL_POST and STCL_POST need one's-complement offsets, rather than two's complement offsets. Add an appropriate immediate type for them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136896 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -626,6 +626,17 @@ def postidx_imm8 : Operand<i32> {
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let MIOperandInfo = (ops i32imm);
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}
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// postidx_imm8s4 := +/- [0,1020]
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//
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// 9 bit value:
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// {8} 1 is imm8 is non-negative. 0 otherwise.
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// {7-0} [0,255] imm8 value, scaled by 4.
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def postidx_imm8s4 : Operand<i32> {
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let PrintMethod = "printPostIdxImm8s4Operand";
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let MIOperandInfo = (ops i32imm);
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}
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// postidx_reg := +/- reg
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//
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def PostIdxRegAsmOperand : AsmOperandClass {
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@ -3974,7 +3985,7 @@ multiclass LdStCop<bits<4> op31_28, bit load, dag ops, string opc, string cond>{
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def L_POST : ACI<(outs),
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!con((ins nohash_imm:$cop, nohash_imm:$CRd, addr_offset_none:$addr,
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i32imm:$offset), ops),
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postidx_imm8s4:$offset), ops),
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!strconcat(!strconcat(opc, "l"), cond), "\tp$cop, cr$CRd, $addr, $offset",
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IndexModePost> {
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let Inst{31-28} = op31_28;
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@ -382,6 +382,15 @@ void ARMInstPrinter::printPostIdxImm8Operand(const MCInst *MI,
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O << '#' << ((Imm & 256) ? "" : "-") << (Imm & 0xff);
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}
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void ARMInstPrinter::printPostIdxImm8s4Operand(const MCInst *MI,
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unsigned OpNum,
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raw_ostream &O) {
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const MCOperand &MO = MI->getOperand(OpNum);
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unsigned Imm = MO.getImm();
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O << '#' << ((Imm & 256) ? "" : "-") << ((Imm & 0xff) << 2);
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}
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void ARMInstPrinter::printLdStmModeOperand(const MCInst *MI, unsigned OpNum,
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raw_ostream &O) {
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ARM_AM::AMSubMode Mode = ARM_AM::getAM4SubMode(MI->getOperand(OpNum)
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@ -55,6 +55,8 @@ public:
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void printAM3PreOrOffsetIndexOp(const MCInst *MI, unsigned Op,raw_ostream &O);
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void printPostIdxImm8Operand(const MCInst *MI, unsigned OpNum,
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raw_ostream &O);
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void printPostIdxImm8s4Operand(const MCInst *MI, unsigned OpNum,
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raw_ostream &O);
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void printLdStmModeOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
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void printAddrMode5Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
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@ -614,6 +614,7 @@ static int ARMFlagFromOpName(LiteralConstantEmitter *type,
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IMM("shr_imm64");
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IMM("t2ldrlabel");
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IMM("postidx_imm8");
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IMM("postidx_imm8s4");
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MISC("brtarget", "kOperandTypeARMBranchTarget"); // ?
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MISC("uncondbrtarget", "kOperandTypeARMBranchTarget"); // ?
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