mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-10-25 10:27:04 +00:00
The change for PR9190 wasn't quite right. We need to avoid making the
transformation if we can't legally create a build vector of the correct type. Check that we can make the transformation first, and add a TODO to refactor this code with similar cases. Fixes: PR9223 and rdar://9000350 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125631 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
41
test/CodeGen/X86/legalize-sub-zero-2.ll
Normal file
41
test/CodeGen/X86/legalize-sub-zero-2.ll
Normal file
@@ -0,0 +1,41 @@
|
||||
; RUN: llc < %s -mtriple=i386-apple-darwin
|
||||
|
||||
define fastcc void @foo(i32 %type) nounwind optsize {
|
||||
entry:
|
||||
switch i32 %type, label %bb26 [
|
||||
i32 33634, label %bb11
|
||||
i32 5121, label %bb27
|
||||
]
|
||||
|
||||
bb11: ; preds = %entry
|
||||
br label %bb27
|
||||
|
||||
bb26: ; preds = %entry
|
||||
unreachable
|
||||
|
||||
bb27: ; preds = %bb11, %entry
|
||||
%srcpb.0 = phi i32 [ 1, %bb11 ], [ 0, %entry ]
|
||||
br i1 undef, label %bb348, label %bb30.lr.ph
|
||||
|
||||
bb30.lr.ph: ; preds = %bb27
|
||||
%.sum743 = shl i32 %srcpb.0, 1
|
||||
%0 = mul i32 %srcpb.0, -2
|
||||
%.sum745 = add i32 %.sum743, %0
|
||||
br i1 undef, label %bb70, label %bb71
|
||||
|
||||
bb70: ; preds = %bb30.lr.ph
|
||||
unreachable
|
||||
|
||||
bb71: ; preds = %bb30.lr.ph
|
||||
br i1 undef, label %bb92, label %bb80
|
||||
|
||||
bb80: ; preds = %bb71
|
||||
unreachable
|
||||
|
||||
bb92: ; preds = %bb71
|
||||
%1 = getelementptr inbounds i8* undef, i32 %.sum745
|
||||
unreachable
|
||||
|
||||
bb348: ; preds = %bb27
|
||||
ret void
|
||||
}
|
||||
Reference in New Issue
Block a user