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Remove AVX hack in X86Subtarget. AVX/AVX2 are now treated as an SSE level. Predicate functions have been altered to maintain previous names and behavior.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147770 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2012-01-09 09:02:13 +00:00
parent 8ffc964582
commit 16de4632bb
3 changed files with 22 additions and 32 deletions
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7
lib/Target/X86/X86.td
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@ -80,9 +80,10 @@ def FeatureSSE4A : SubtargetFeature<"sse4a", "HasSSE4A", "true",
"Support SSE 4a instructions", "Support SSE 4a instructions",
[FeatureSSE3]>; [FeatureSSE3]>;
def FeatureAVX : SubtargetFeature<"avx", "HasAVX", "true", def FeatureAVX : SubtargetFeature<"avx", "X86SSELevel", "AVX",
"Enable AVX instructions">; "Enable AVX instructions",
def FeatureAVX2 : SubtargetFeature<"avx2", "HasAVX2", "true", [FeatureSSE42]>;
def FeatureAVX2 : SubtargetFeature<"avx2", "X86SSELevel", "AVX2",
"Enable AVX2 instructions", "Enable AVX2 instructions",
[FeatureAVX]>; [FeatureAVX]>;
def FeatureCLMUL : SubtargetFeature<"clmul", "HasCLMUL", "true", def FeatureCLMUL : SubtargetFeature<"clmul", "HasCLMUL", "true",

11
lib/Target/X86/X86Subtarget.cpp
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@ -198,7 +198,7 @@ void X86Subtarget::AutoDetectSubtargetFeatures() {
if ((ECX >> 19) & 1) { X86SSELevel = SSE41; ToggleFeature(X86::FeatureSSE41);} if ((ECX >> 19) & 1) { X86SSELevel = SSE41; ToggleFeature(X86::FeatureSSE41);}
if ((ECX >> 20) & 1) { X86SSELevel = SSE42; ToggleFeature(X86::FeatureSSE42);} if ((ECX >> 20) & 1) { X86SSELevel = SSE42; ToggleFeature(X86::FeatureSSE42);}
// FIXME: AVX codegen support is not ready. // FIXME: AVX codegen support is not ready.
//if ((ECX >> 28) & 1) { HasAVX = true; ToggleFeature(X86::FeatureAVX); } //if ((ECX >> 28) & 1) { X86SSELevel = AVX; ToggleFeature(X86::FeatureAVX); }
bool IsIntel = memcmp(text.c, "GenuineIntel", 12) == 0; bool IsIntel = memcmp(text.c, "GenuineIntel", 12) == 0;
bool IsAMD = !IsIntel && memcmp(text.c, "AuthenticAMD", 12) == 0; bool IsAMD = !IsIntel && memcmp(text.c, "AuthenticAMD", 12) == 0;
@ -295,7 +295,7 @@ void X86Subtarget::AutoDetectSubtargetFeatures() {
} }
// FIXME: AVX2 codegen support is not ready. // FIXME: AVX2 codegen support is not ready.
//if ((EBX >> 5) & 0x1) { //if ((EBX >> 5) & 0x1) {
// HasAVX2 = true; // X86SSELevel = AVX2;;
// ToggleFeature(X86::FeatureAVX2); // ToggleFeature(X86::FeatureAVX2);
//} //}
if ((EBX >> 8) & 0x1) { if ((EBX >> 8) & 0x1) {
@ -317,8 +317,6 @@ X86Subtarget::X86Subtarget(const std::string &TT, const std::string &CPU,
, HasX86_64(false) , HasX86_64(false)
, HasPOPCNT(false) , HasPOPCNT(false)
, HasSSE4A(false) , HasSSE4A(false)
, HasAVX(false)
, HasAVX2(false)
, HasAES(false) , HasAES(false)
, HasCLMUL(false) , HasCLMUL(false)
, HasFMA3(false) , HasFMA3(false)
@ -372,7 +370,7 @@ X86Subtarget::X86Subtarget(const std::string &TT, const std::string &CPU,
HasX86_64 = true; ToggleFeature(X86::Feature64Bit); HasX86_64 = true; ToggleFeature(X86::Feature64Bit);
HasCMov = true; ToggleFeature(X86::FeatureCMOV); HasCMov = true; ToggleFeature(X86::FeatureCMOV);
if (!HasAVX && X86SSELevel < SSE2) { if (X86SSELevel < SSE2) {
X86SSELevel = SSE2; X86SSELevel = SSE2;
ToggleFeature(X86::FeatureSSE1); ToggleFeature(X86::FeatureSSE1);
ToggleFeature(X86::FeatureSSE2); ToggleFeature(X86::FeatureSSE2);
@ -385,9 +383,6 @@ X86Subtarget::X86Subtarget(const std::string &TT, const std::string &CPU,
if (In64BitMode) if (In64BitMode)
ToggleFeature(X86::Mode64Bit); ToggleFeature(X86::Mode64Bit);
if (HasAVX)
X86SSELevel = MMX;
DEBUG(dbgs() << "Subtarget features: SSELevel " << X86SSELevel DEBUG(dbgs() << "Subtarget features: SSELevel " << X86SSELevel
<< ", 3DNowLevel " << X863DNowLevel << ", 3DNowLevel " << X863DNowLevel
<< ", 64bit " << HasX86_64 << "\n"); << ", 64bit " << HasX86_64 << "\n");

36
lib/Target/X86/X86Subtarget.h
View File

@ -42,7 +42,7 @@ enum Style {
class X86Subtarget : public X86GenSubtargetInfo { class X86Subtarget : public X86GenSubtargetInfo {
protected: protected:
enum X86SSEEnum { enum X86SSEEnum {
NoMMXSSE, MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42 NoMMXSSE, MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2
}; };
enum X863DNowEnum { enum X863DNowEnum {
@ -75,12 +75,6 @@ protected:
/// HasSSE4A - True if the processor supports SSE4A instructions. /// HasSSE4A - True if the processor supports SSE4A instructions.
bool HasSSE4A; bool HasSSE4A;
/// HasAVX - Target has AVX instructions
bool HasAVX;
/// HasAVX2 - Target has AVX2 instructions
bool HasAVX2;
/// HasAES - Target has AES instructions /// HasAES - Target has AES instructions
bool HasAES; bool HasAES;
@ -179,24 +173,24 @@ public:
bool hasCMov() const { return HasCMov; } bool hasCMov() const { return HasCMov; }
bool hasMMX() const { return X86SSELevel >= MMX; } bool hasMMX() const { return X86SSELevel >= MMX; }
bool hasSSE1() const { return X86SSELevel >= SSE1; } bool hasSSE1() const { return X86SSELevel >= SSE1 && !hasAVX(); }
bool hasSSE2() const { return X86SSELevel >= SSE2; } bool hasSSE2() const { return X86SSELevel >= SSE2 && !hasAVX(); }
bool hasSSE3() const { return X86SSELevel >= SSE3; } bool hasSSE3() const { return X86SSELevel >= SSE3 && !hasAVX(); }
bool hasSSSE3() const { return X86SSELevel >= SSSE3; } bool hasSSSE3() const { return X86SSELevel >= SSSE3 && !hasAVX(); }
bool hasSSE41() const { return X86SSELevel >= SSE41; } bool hasSSE41() const { return X86SSELevel >= SSE41 && !hasAVX(); }
bool hasSSE42() const { return X86SSELevel >= SSE42; } bool hasSSE42() const { return X86SSELevel >= SSE42 && !hasAVX(); }
bool hasSSE4A() const { return HasSSE4A; } bool hasSSE4A() const { return HasSSE4A; }
bool has3DNow() const { return X863DNowLevel >= ThreeDNow; } bool has3DNow() const { return X863DNowLevel >= ThreeDNow; }
bool has3DNowA() const { return X863DNowLevel >= ThreeDNowA; } bool has3DNowA() const { return X863DNowLevel >= ThreeDNowA; }
bool hasPOPCNT() const { return HasPOPCNT; } bool hasPOPCNT() const { return HasPOPCNT; }
bool hasAVX() const { return HasAVX; } bool hasAVX() const { return X86SSELevel >= AVX; }
bool hasAVX2() const { return HasAVX2; } bool hasAVX2() const { return X86SSELevel >= AVX2; }
bool hasXMM() const { return hasSSE1() || hasAVX(); } bool hasXMM() const { return X86SSELevel >= SSE1; }
bool hasXMMInt() const { return hasSSE2() || hasAVX(); } bool hasXMMInt() const { return X86SSELevel >= SSE2; }
bool hasSSE3orAVX() const { return hasSSE3() || hasAVX(); } bool hasSSE3orAVX() const { return X86SSELevel >= SSE3; }
bool hasSSSE3orAVX() const { return hasSSSE3() || hasAVX(); } bool hasSSSE3orAVX() const { return X86SSELevel >= SSSE3; }
bool hasSSE41orAVX() const { return hasSSE41() || hasAVX(); } bool hasSSE41orAVX() const { return X86SSELevel >= SSE41; }
bool hasSSE42orAVX() const { return hasSSE42() || hasAVX(); } bool hasSSE42orAVX() const { return X86SSELevel >= SSE42; }
bool hasAES() const { return HasAES; } bool hasAES() const { return HasAES; }
bool hasCLMUL() const { return HasCLMUL; } bool hasCLMUL() const { return HasCLMUL; }
bool hasFMA3() const { return HasFMA3; } bool hasFMA3() const { return HasFMA3; }