6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-02-01 02:33:44 +00:00
Code Issues Projects Releases Wiki Activity

Remove this MachineOpCodeFlags assertion - its test can never be false.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11342 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Brian Gaeke 2004-02-12 04:01:07 +00:00
parent 2d58f0691e
commit 17247c64f2
1 changed files with 0 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp
View File

@ -530,8 +530,6 @@ void PhyRegAlloc::updateMachineCode()
AddedInstrMap[DelaySlotMI].InstrnsAfter.size() > 0));
if (cond1 || cond2) {
assert((MII->getOpCodeFlags() & AnnulFlag) == 0 &&
"FIXME: Moving an annulled delay slot instruction!");
assert(delaySlots==1 &&
"InsertBefore does not yet handle >1 delay slots!");