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Handle COPY in VirtRegRewriter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107949 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2443,6 +2443,24 @@ LocalRewriter::RewriteMBB(LiveIntervals *LIs,
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// Also check if it's copying from an "undef", if so, we can't
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// Also check if it's copying from an "undef", if so, we can't
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// eliminate this or else the undef marker is lost and it will
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// eliminate this or else the undef marker is lost and it will
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// confuses the scavenger. This is extremely rare.
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// confuses the scavenger. This is extremely rare.
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if (MI.isIdentityCopy() && !MI.getOperand(1).isUndef() &&
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MI.getNumOperands() == 2) {
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++NumDCE;
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DEBUG(dbgs() << "Removing now-noop copy: " << MI);
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SmallVector<unsigned, 2> KillRegs;
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InvalidateKills(MI, TRI, RegKills, KillOps, &KillRegs);
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if (MO.isDead() && !KillRegs.empty()) {
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// Source register or an implicit super/sub-register use is killed.
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assert(TRI->regsOverlap(KillRegs[0], MI.getOperand(0).getReg()));
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// Last def is now dead.
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TransferDeadness(MI.getOperand(1).getReg(), RegKills, KillOps);
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}
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VRM->RemoveMachineInstrFromMaps(&MI);
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MBB->erase(&MI);
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Erased = true;
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Spills.disallowClobberPhysReg(VirtReg);
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goto ProcessNextInst;
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}
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unsigned Src, Dst, SrcSR, DstSR;
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unsigned Src, Dst, SrcSR, DstSR;
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if (TII->isMoveInstr(MI, Src, Dst, SrcSR, DstSR) &&
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if (TII->isMoveInstr(MI, Src, Dst, SrcSR, DstSR) &&
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Src == Dst && SrcSR == DstSR &&
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Src == Dst && SrcSR == DstSR &&
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@ -2532,6 +2550,16 @@ LocalRewriter::RewriteMBB(LiveIntervals *LIs,
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// Check to see if this is a noop copy. If so, eliminate the
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// Check to see if this is a noop copy. If so, eliminate the
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// instruction before considering the dest reg to be changed.
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// instruction before considering the dest reg to be changed.
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if (MI.isIdentityCopy()) {
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++NumDCE;
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DEBUG(dbgs() << "Removing now-noop copy: " << MI);
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InvalidateKills(MI, TRI, RegKills, KillOps);
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VRM->RemoveMachineInstrFromMaps(&MI);
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MBB->erase(&MI);
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Erased = true;
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UpdateKills(*LastStore, TRI, RegKills, KillOps);
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goto ProcessNextInst;
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}
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{
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{
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unsigned Src, Dst, SrcSR, DstSR;
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unsigned Src, Dst, SrcSR, DstSR;
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if (TII->isMoveInstr(MI, Src, Dst, SrcSR, DstSR) &&
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if (TII->isMoveInstr(MI, Src, Dst, SrcSR, DstSR) &&
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