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https://github.com/c64scene-ar/llvm-6502.git
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[X86] Generate MOVNT for all vector types.
We used to miss non-Q YMM integer vectors, and, non-Q/D XMM integer vectors. While there, change the v4i32 patterns to prefer MOVNTDQ. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233668 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Ahmed Bougacha
parent
4e5fdbfc61
commit
18128bd376
@ -3678,13 +3678,30 @@ def MOVNTI_64mr : RI<0xC3, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src),
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PS, Requires<[HasSSE2]>;
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} // SchedRW = [WriteStore]
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let Predicates = [HasAVX2, NoVLX] in {
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def : Pat<(alignednontemporalstore (v8i32 VR256:$src), addr:$dst),
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(VMOVNTDQYmr addr:$dst, VR256:$src)>;
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def : Pat<(alignednontemporalstore (v16i16 VR256:$src), addr:$dst),
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(VMOVNTDQYmr addr:$dst, VR256:$src)>;
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def : Pat<(alignednontemporalstore (v32i8 VR256:$src), addr:$dst),
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(VMOVNTDQYmr addr:$dst, VR256:$src)>;
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}
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let Predicates = [HasAVX, NoVLX] in {
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def : Pat<(alignednontemporalstore (v4i32 VR128:$src), addr:$dst),
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(VMOVNTPSmr addr:$dst, VR128:$src)>;
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(VMOVNTDQmr addr:$dst, VR128:$src)>;
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def : Pat<(alignednontemporalstore (v8i16 VR128:$src), addr:$dst),
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(VMOVNTDQmr addr:$dst, VR128:$src)>;
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def : Pat<(alignednontemporalstore (v16i8 VR128:$src), addr:$dst),
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(VMOVNTDQmr addr:$dst, VR128:$src)>;
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}
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def : Pat<(alignednontemporalstore (v4i32 VR128:$src), addr:$dst),
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(MOVNTPSmr addr:$dst, VR128:$src)>;
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(MOVNTDQmr addr:$dst, VR128:$src)>;
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def : Pat<(alignednontemporalstore (v8i16 VR128:$src), addr:$dst),
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(MOVNTDQmr addr:$dst, VR128:$src)>;
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def : Pat<(alignednontemporalstore (v16i8 VR128:$src), addr:$dst),
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(MOVNTDQmr addr:$dst, VR128:$src)>;
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} // AddedComplexity
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@ -1,31 +1,303 @@
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=corei7 | FileCheck %s -check-prefix=CHECK -check-prefix=SSE
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=corei7-avx | FileCheck %s -check-prefix=CHECK -check-prefix=AVX
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=core-avx2 | FileCheck %s -check-prefix=CHECK -check-prefix=AVX2
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; Make sure that we generate non-temporal stores for the test cases below.
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; We use xorps for zeroing, so domain information isn't available anymore.
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define void @test1(<4 x float>* %dst) {
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; CHECK-LABEL: test1:
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define void @test_zero_v4f32(<4 x float>* %dst) {
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; CHECK-LABEL: test_zero_v4f32:
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; SSE: movntps
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; AVX: vmovntps
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store <4 x float> zeroinitializer, <4 x float>* %dst, align 16, !nontemporal !1
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ret void
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}
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define void @test2(<4 x i32>* %dst) {
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; CHECK-LABEL: test2:
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define void @test_zero_v4i32(<4 x i32>* %dst) {
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; CHECK-LABEL: test_zero_v4i32:
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; SSE: movntps
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; AVX: vmovntps
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store <4 x i32> zeroinitializer, <4 x i32>* %dst, align 16, !nontemporal !1
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ret void
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}
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define void @test3(<2 x double>* %dst) {
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; CHECK-LABEL: test3:
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define void @test_zero_v2f64(<2 x double>* %dst) {
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; CHECK-LABEL: test_zero_v2f64:
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; SSE: movntps
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; AVX: vmovntps
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store <2 x double> zeroinitializer, <2 x double>* %dst, align 16, !nontemporal !1
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ret void
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}
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define void @test_zero_v2i64(<2 x i64>* %dst) {
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; CHECK-LABEL: test_zero_v2i64:
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; SSE: movntps
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; AVX: vmovntps
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store <2 x i64> zeroinitializer, <2 x i64>* %dst, align 16, !nontemporal !1
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ret void
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}
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define void @test_zero_v8i16(<8 x i16>* %dst) {
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; CHECK-LABEL: test_zero_v8i16:
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; SSE: movntps
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; AVX: vmovntps
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store <8 x i16> zeroinitializer, <8 x i16>* %dst, align 16, !nontemporal !1
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ret void
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}
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define void @test_zero_v16i8(<16 x i8>* %dst) {
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; CHECK-LABEL: test_zero_v16i8:
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; SSE: movntps
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; AVX: vmovntps
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store <16 x i8> zeroinitializer, <16 x i8>* %dst, align 16, !nontemporal !1
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ret void
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}
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; And now YMM versions.
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define void @test_zero_v8f32(<8 x float>* %dst) {
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; CHECK-LABEL: test_zero_v8f32:
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; AVX: vmovntps %ymm
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store <8 x float> zeroinitializer, <8 x float>* %dst, align 32, !nontemporal !1
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ret void
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}
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define void @test_zero_v8i32(<8 x i32>* %dst) {
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; CHECK-LABEL: test_zero_v8i32:
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; AVX2: vmovntps %ymm
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store <8 x i32> zeroinitializer, <8 x i32>* %dst, align 32, !nontemporal !1
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ret void
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}
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define void @test_zero_v4f64(<4 x double>* %dst) {
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; CHECK-LABEL: test_zero_v4f64:
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; AVX: vmovntps %ymm
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store <4 x double> zeroinitializer, <4 x double>* %dst, align 32, !nontemporal !1
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ret void
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}
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define void @test_zero_v4i64(<4 x i64>* %dst) {
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; CHECK-LABEL: test_zero_v4i64:
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; AVX2: vmovntps %ymm
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store <4 x i64> zeroinitializer, <4 x i64>* %dst, align 32, !nontemporal !1
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ret void
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}
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define void @test_zero_v16i16(<16 x i16>* %dst) {
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; CHECK-LABEL: test_zero_v16i16:
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; AVX2: vmovntps %ymm
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store <16 x i16> zeroinitializer, <16 x i16>* %dst, align 32, !nontemporal !1
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ret void
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}
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define void @test_zero_v32i8(<32 x i8>* %dst) {
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; CHECK-LABEL: test_zero_v32i8:
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; AVX2: vmovntps %ymm
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store <32 x i8> zeroinitializer, <32 x i8>* %dst, align 32, !nontemporal !1
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ret void
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}
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; Check that we also handle arguments. Here the type survives longer.
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define void @test_arg_v4f32(<4 x float> %arg, <4 x float>* %dst) {
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; CHECK-LABEL: test_arg_v4f32:
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; SSE: movntps
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; AVX: vmovntps
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store <4 x float> %arg, <4 x float>* %dst, align 16, !nontemporal !1
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ret void
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}
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define void @test_arg_v4i32(<4 x i32> %arg, <4 x i32>* %dst) {
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; CHECK-LABEL: test_arg_v4i32:
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; SSE: movntps
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; AVX: vmovntps
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store <4 x i32> %arg, <4 x i32>* %dst, align 16, !nontemporal !1
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ret void
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}
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define void @test_arg_v2f64(<2 x double> %arg, <2 x double>* %dst) {
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; CHECK-LABEL: test_arg_v2f64:
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; SSE: movntps
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; AVX: vmovntps
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store <2 x double> %arg, <2 x double>* %dst, align 16, !nontemporal !1
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ret void
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}
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define void @test_arg_v2i64(<2 x i64> %arg, <2 x i64>* %dst) {
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; CHECK-LABEL: test_arg_v2i64:
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; SSE: movntps
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; AVX: vmovntps
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store <2 x i64> %arg, <2 x i64>* %dst, align 16, !nontemporal !1
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ret void
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}
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define void @test_arg_v8i16(<8 x i16> %arg, <8 x i16>* %dst) {
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; CHECK-LABEL: test_arg_v8i16:
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; SSE: movntps
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; AVX: vmovntps
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store <8 x i16> %arg, <8 x i16>* %dst, align 16, !nontemporal !1
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ret void
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}
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define void @test_arg_v16i8(<16 x i8> %arg, <16 x i8>* %dst) {
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; CHECK-LABEL: test_arg_v16i8:
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; SSE: movntps
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; AVX: vmovntps
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store <16 x i8> %arg, <16 x i8>* %dst, align 16, !nontemporal !1
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ret void
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}
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; And now YMM versions.
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define void @test_arg_v8f32(<8 x float> %arg, <8 x float>* %dst) {
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; CHECK-LABEL: test_arg_v8f32:
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; AVX: vmovntps %ymm
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store <8 x float> %arg, <8 x float>* %dst, align 32, !nontemporal !1
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ret void
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}
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define void @test_arg_v8i32(<8 x i32> %arg, <8 x i32>* %dst) {
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; CHECK-LABEL: test_arg_v8i32:
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; AVX2: vmovntps %ymm
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store <8 x i32> %arg, <8 x i32>* %dst, align 32, !nontemporal !1
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ret void
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}
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define void @test_arg_v4f64(<4 x double> %arg, <4 x double>* %dst) {
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; CHECK-LABEL: test_arg_v4f64:
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; AVX: vmovntps %ymm
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store <4 x double> %arg, <4 x double>* %dst, align 32, !nontemporal !1
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ret void
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}
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define void @test_arg_v4i64(<4 x i64> %arg, <4 x i64>* %dst) {
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; CHECK-LABEL: test_arg_v4i64:
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; AVX2: vmovntps %ymm
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store <4 x i64> %arg, <4 x i64>* %dst, align 32, !nontemporal !1
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ret void
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}
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define void @test_arg_v16i16(<16 x i16> %arg, <16 x i16>* %dst) {
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; CHECK-LABEL: test_arg_v16i16:
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; AVX2: vmovntps %ymm
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store <16 x i16> %arg, <16 x i16>* %dst, align 32, !nontemporal !1
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ret void
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}
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define void @test_arg_v32i8(<32 x i8> %arg, <32 x i8>* %dst) {
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; CHECK-LABEL: test_arg_v32i8:
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; AVX2: vmovntps %ymm
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store <32 x i8> %arg, <32 x i8>* %dst, align 32, !nontemporal !1
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ret void
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}
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; Now check that if the execution domain is trivially visible, we use it.
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; We use an add to make the type survive all the way to the MOVNT.
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define void @test_op_v4f32(<4 x float> %a, <4 x float> %b, <4 x float>* %dst) {
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; CHECK-LABEL: test_op_v4f32:
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; SSE: movntps
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; AVX: vmovntps
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%r = fadd <4 x float> %a, %b
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store <4 x float> %r, <4 x float>* %dst, align 16, !nontemporal !1
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ret void
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}
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define void @test_op_v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32>* %dst) {
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; CHECK-LABEL: test_op_v4i32:
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; SSE: movntdq
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; AVX: vmovntdq
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%r = add <4 x i32> %a, %b
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store <4 x i32> %r, <4 x i32>* %dst, align 16, !nontemporal !1
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ret void
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}
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define void @test_op_v2f64(<2 x double> %a, <2 x double> %b, <2 x double>* %dst) {
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; CHECK-LABEL: test_op_v2f64:
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; SSE: movntpd
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; AVX: vmovntpd
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%r = fadd <2 x double> %a, %b
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store <2 x double> %r, <2 x double>* %dst, align 16, !nontemporal !1
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ret void
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}
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define void @test_op_v2i64(<2 x i64> %a, <2 x i64> %b, <2 x i64>* %dst) {
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; CHECK-LABEL: test_op_v2i64:
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; SSE: movntdq
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; AVX: vmovntdq
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%r = add <2 x i64> %a, %b
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store <2 x i64> %r, <2 x i64>* %dst, align 16, !nontemporal !1
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ret void
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}
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define void @test_op_v8i16(<8 x i16> %a, <8 x i16> %b, <8 x i16>* %dst) {
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; CHECK-LABEL: test_op_v8i16:
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; SSE: movntdq
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; AVX: vmovntdq
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%r = add <8 x i16> %a, %b
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store <8 x i16> %r, <8 x i16>* %dst, align 16, !nontemporal !1
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ret void
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}
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define void @test_op_v16i8(<16 x i8> %a, <16 x i8> %b, <16 x i8>* %dst) {
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; CHECK-LABEL: test_op_v16i8:
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; SSE: movntdq
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; AVX: vmovntdq
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%r = add <16 x i8> %a, %b
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store <16 x i8> %r, <16 x i8>* %dst, align 16, !nontemporal !1
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ret void
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}
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; And now YMM versions.
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define void @test_op_v8f32(<8 x float> %a, <8 x float> %b, <8 x float>* %dst) {
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; CHECK-LABEL: test_op_v8f32:
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; AVX: vmovntps %ymm
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%r = fadd <8 x float> %a, %b
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store <8 x float> %r, <8 x float>* %dst, align 32, !nontemporal !1
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ret void
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}
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define void @test_op_v8i32(<8 x i32> %a, <8 x i32> %b, <8 x i32>* %dst) {
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; CHECK-LABEL: test_op_v8i32:
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; AVX2: vmovntdq %ymm
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%r = add <8 x i32> %a, %b
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store <8 x i32> %r, <8 x i32>* %dst, align 32, !nontemporal !1
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ret void
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}
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define void @test_op_v4f64(<4 x double> %a, <4 x double> %b, <4 x double>* %dst) {
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; CHECK-LABEL: test_op_v4f64:
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; AVX: vmovntpd %ymm
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%r = fadd <4 x double> %a, %b
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store <4 x double> %r, <4 x double>* %dst, align 32, !nontemporal !1
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ret void
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}
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define void @test_op_v4i64(<4 x i64> %a, <4 x i64> %b, <4 x i64>* %dst) {
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; CHECK-LABEL: test_op_v4i64:
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; AVX2: vmovntdq %ymm
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%r = add <4 x i64> %a, %b
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store <4 x i64> %r, <4 x i64>* %dst, align 32, !nontemporal !1
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ret void
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}
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define void @test_op_v16i16(<16 x i16> %a, <16 x i16> %b, <16 x i16>* %dst) {
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; CHECK-LABEL: test_op_v16i16:
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; AVX2: vmovntdq %ymm
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%r = add <16 x i16> %a, %b
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store <16 x i16> %r, <16 x i16>* %dst, align 32, !nontemporal !1
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ret void
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}
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define void @test_op_v32i8(<32 x i8> %a, <32 x i8> %b, <32 x i8>* %dst) {
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; CHECK-LABEL: test_op_v32i8:
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; AVX2: vmovntdq %ymm
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%r = add <32 x i8> %a, %b
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store <32 x i8> %r, <32 x i8>* %dst, align 32, !nontemporal !1
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ret void
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}
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!1 = !{i32 1}
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