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Remove a redundant AfterLegalize check. Turn

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on some code when !AfterLegalize - but since
this whole code section is turned off by an
"if (0)" it's not really turning anything on.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52276 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Duncan Sands
2008-06-14 17:48:34 +00:00
parent 5d2bc857ec
commit 184a876ee6
1 changed files with 5 additions and 4 deletions
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9
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@@ -4758,8 +4758,7 @@ SDOperand DAGCombiner::visitEXTRACT_VECTOR_ELT(SDNode *N) {
// original load. // original load.
unsigned NewAlign = TLI.getTargetMachine().getTargetData()-> unsigned NewAlign = TLI.getTargetMachine().getTargetData()->
getABITypeAlignment(LVT.getTypeForMVT()); getABITypeAlignment(LVT.getTypeForMVT());
if (NewAlign > Align || if (NewAlign > Align || !TLI.isOperationLegal(ISD::LOAD, LVT))
(AfterLegalize && !TLI.isOperationLegal(ISD::LOAD, LVT)))
return SDOperand(); return SDOperand();
Align = NewAlign; Align = NewAlign;
} }
@@ -5350,7 +5349,8 @@ SDOperand DAGCombiner::SimplifySelectCC(SDOperand N0, SDOperand N1,
// otherwise, go ahead with the folds. // otherwise, go ahead with the folds.
if (0 && N3C && N3C->isNullValue() && N2C && (N2C->getAPIntValue() == 1ULL)) { if (0 && N3C && N3C->isNullValue() && N2C && (N2C->getAPIntValue() == 1ULL)) {
MVT XType = N0.getValueType(); MVT XType = N0.getValueType();
if (TLI.isOperationLegal(ISD::SETCC, TLI.getSetCCResultType(N0))) { if (!AfterLegalize ||
TLI.isOperationLegal(ISD::SETCC, TLI.getSetCCResultType(N0))) {
SDOperand Res = DAG.getSetCC(TLI.getSetCCResultType(N0), N0, N1, CC); SDOperand Res = DAG.getSetCC(TLI.getSetCCResultType(N0), N0, N1, CC);
if (Res.getValueType() != VT) if (Res.getValueType() != VT)
Res = DAG.getNode(ISD::ZERO_EXTEND, VT, Res); Res = DAG.getNode(ISD::ZERO_EXTEND, VT, Res);
@@ -5359,7 +5359,8 @@ SDOperand DAGCombiner::SimplifySelectCC(SDOperand N0, SDOperand N1,
// seteq X, 0 -> srl (ctlz X, log2(size(X))) // seteq X, 0 -> srl (ctlz X, log2(size(X)))
if (N1C && N1C->isNullValue() && CC == ISD::SETEQ && if (N1C && N1C->isNullValue() && CC == ISD::SETEQ &&
TLI.isOperationLegal(ISD::CTLZ, XType)) { (!AfterLegalize ||
TLI.isOperationLegal(ISD::CTLZ, XType))) {
SDOperand Ctlz = DAG.getNode(ISD::CTLZ, XType, N0); SDOperand Ctlz = DAG.getNode(ISD::CTLZ, XType, N0);
return DAG.getNode(ISD::SRL, XType, Ctlz, return DAG.getNode(ISD::SRL, XType, Ctlz,
DAG.getConstant(Log2_32(XType.getSizeInBits()), DAG.getConstant(Log2_32(XType.getSizeInBits()),