[ARM64] Fix wrong comment in load/store optimization pass.

ldr x1, [x0, #64]
add x0, x0, #64
 ->
ldr x1, [x0], #64

is not a valid transformation, the correct transformation (and what the code actually does) is:

ldr x1, [x0, #64]
add x0, x0, #64
 ->
ldr x1, [x0, #64]!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208998 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tilmann Scheller 2014-05-16 16:50:13 +00:00
parent 54978b3645
commit 18fc3275c1

View File

@ -892,7 +892,7 @@ bool ARM64LoadStoreOpt::optimizeBlock(MachineBasicBlock &MBB) {
// ldr x1, [x0, #64]
// add x0, x0, #64
// merged into:
// ldr x1, [x0], #64
// ldr x1, [x0, #64]!
// The immediate in the load/store is scaled by the size of the register
// being loaded. The immediate in the add we're looking for,