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[PM] Switch the TargetMachine interface from accepting a pass manager

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base which it adds a single analysis pass to, to instead return the type
erased TargetTransformInfo object constructed for that TargetMachine.

This removes all of the pass variants for TTI. There is now a single TTI
*pass* in the Analysis layer. All of the Analysis <-> Target
communication is through the TTI's type erased interface itself. While
the diff is large here, it is nothing more that code motion to make
types available in a header file for use in a different source file
within each target.

I've tried to keep all the doxygen comments and file boilerplate in line
with this move, but let me know if I missed anything.

With this in place, the next step to making TTI work with the new pass
manager is to introduce a really simple new-style analysis that produces
a TTI object via a callback into this routine on the target machine.
Once we have that, we'll have the building blocks necessary to accept
a function argument as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227685 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chandler Carruth
2015-01-31 11:17:59 +00:00
parent 2d94613ec1
commit 1937233a22
40 changed files with 761 additions and 665 deletions
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53
lib/Target/R600/AMDGPUTargetTransformInfo.cpp
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@@ -15,8 +15,7 @@
//
//===----------------------------------------------------------------------===//
#include "AMDGPU.h"
#include "AMDGPUTargetMachine.h"
#include "AMDGPUTargetTransformInfo.h"
#include "llvm/Analysis/LoopInfo.h"
#include "llvm/Analysis/TargetTransformInfo.h"
#include "llvm/Analysis/ValueTracking.h"
@@ -28,56 +27,6 @@ using namespace llvm;
#define DEBUG_TYPE "AMDGPUtti"
namespace {
class AMDGPUTTIImpl : public BasicTTIImplBase<AMDGPUTTIImpl> {
typedef BasicTTIImplBase<AMDGPUTTIImpl> BaseT;
typedef TargetTransformInfo TTI;
const AMDGPUSubtarget *ST;
public:
explicit AMDGPUTTIImpl(const AMDGPUTargetMachine *TM = nullptr)
: BaseT(TM), ST(TM->getSubtargetImpl()) {}
// Provide value semantics. MSVC requires that we spell all of these out.
AMDGPUTTIImpl(const AMDGPUTTIImpl &Arg)
: BaseT(static_cast<const BaseT &>(Arg)), ST(Arg.ST) {}
AMDGPUTTIImpl(AMDGPUTTIImpl &&Arg)
: BaseT(std::move(static_cast<BaseT &>(Arg))), ST(std::move(Arg.ST)) {}
AMDGPUTTIImpl &operator=(const AMDGPUTTIImpl &RHS) {
BaseT::operator=(static_cast<const BaseT &>(RHS));
ST = RHS.ST;
return *this;
}
AMDGPUTTIImpl &operator=(AMDGPUTTIImpl &&RHS) {
BaseT::operator=(std::move(static_cast<BaseT &>(RHS)));
ST = std::move(RHS.ST);
return *this;
}
bool hasBranchDivergence() { return true; }
void getUnrollingPreferences(const Function *F, Loop *L,
TTI::UnrollingPreferences &UP);
TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth) {
assert(isPowerOf2_32(TyWidth) && "Ty width must be power of 2");
return ST->hasBCNT(TyWidth) ? TTI::PSK_FastHardware : TTI::PSK_Software;
}
unsigned getNumberOfRegisters(bool Vector);
unsigned getRegisterBitWidth(bool Vector);
unsigned getMaxInterleaveFactor();
};
} // end anonymous namespace
ImmutablePass *
llvm::createAMDGPUTargetTransformInfoPass(const AMDGPUTargetMachine *TM) {
return new TargetTransformInfoWrapperPass(AMDGPUTTIImpl(TM));
}
void AMDGPUTTIImpl::getUnrollingPreferences(const Function *, Loop *L,
TTI::UnrollingPreferences &UP) {
UP.Threshold = 300; // Twice the default.