6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-06-17 04:24:00 +00:00
Code Issues Projects Releases Wiki Activity

Implement v16i8 multiply with this code:

Browse Source 
vmuloub v5, v3, v2
        vmuleub v2, v3, v2
        vperm v2, v2, v5, v4

This implements CodeGen/PowerPC/vec_mul.ll.  With this, v16i8 multiplies are
6.79x faster than before.

Overall, UnitTests/Vector/multiplies.c is now 2.45x faster with LLVM than with
GCC.

Remove the 'integer multiplies' todo from the README file.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27792 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
2006-04-18 03:57:35 +00:00
parent a637e58918
commit 19a815238e
2 changed files with 25 additions and 11 deletions
Download Patch File Download Diff File Expand all files Collapse all files

27
lib/Target/PowerPC/PPCISelLowering.cpp
View File

@ -229,6 +229,7 @@ PPCTargetLowering::PPCTargetLowering(TargetMachine &TM)
setOperationAction(ISD::MUL, MVT::v4f32, Legal); setOperationAction(ISD::MUL, MVT::v4f32, Legal);
setOperationAction(ISD::MUL, MVT::v4i32, Custom); setOperationAction(ISD::MUL, MVT::v4i32, Custom);
setOperationAction(ISD::MUL, MVT::v8i16, Custom); setOperationAction(ISD::MUL, MVT::v8i16, Custom);
setOperationAction(ISD::MUL, MVT::v16i8, Custom);
setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v4f32, Custom); setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v4f32, Custom);
setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v4i32, Custom); setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v4i32, Custom);
@ -1601,12 +1602,12 @@ static SDOperand LowerMUL(SDOperand Op, SelectionDAG &DAG) {
} else if (Op.getValueType() == MVT::v8i16) { } else if (Op.getValueType() == MVT::v8i16) {
SDOperand LHS = Op.getOperand(0), RHS = Op.getOperand(1); SDOperand LHS = Op.getOperand(0), RHS = Op.getOperand(1);
// Multiply the even 16-parts, producing 32-bit sums. // Multiply the even 16-bit parts, producing 32-bit sums.
SDOperand EvenParts = BuildIntrinsicOp(Intrinsic::ppc_altivec_vmuleuh, SDOperand EvenParts = BuildIntrinsicOp(Intrinsic::ppc_altivec_vmuleuh,
LHS, RHS, DAG, MVT::v4i32); LHS, RHS, DAG, MVT::v4i32);
EvenParts = DAG.getNode(ISD::BIT_CONVERT, MVT::v8i16, EvenParts); EvenParts = DAG.getNode(ISD::BIT_CONVERT, MVT::v8i16, EvenParts);
// Multiply the odd 16-parts, producing 32-bit sums. // Multiply the odd 16-bit parts, producing 32-bit sums.
SDOperand OddParts = BuildIntrinsicOp(Intrinsic::ppc_altivec_vmulouh, SDOperand OddParts = BuildIntrinsicOp(Intrinsic::ppc_altivec_vmulouh,
LHS, RHS, DAG, MVT::v4i32); LHS, RHS, DAG, MVT::v4i32);
OddParts = DAG.getNode(ISD::BIT_CONVERT, MVT::v8i16, OddParts); OddParts = DAG.getNode(ISD::BIT_CONVERT, MVT::v8i16, OddParts);
@ -1620,6 +1621,28 @@ static SDOperand LowerMUL(SDOperand Op, SelectionDAG &DAG) {
return DAG.getNode(ISD::VECTOR_SHUFFLE, MVT::v8i16, EvenParts, OddParts, return DAG.getNode(ISD::VECTOR_SHUFFLE, MVT::v8i16, EvenParts, OddParts,
DAG.getNode(ISD::BUILD_VECTOR, MVT::v8i16, Ops)); DAG.getNode(ISD::BUILD_VECTOR, MVT::v8i16, Ops));
} else if (Op.getValueType() == MVT::v16i8) {
SDOperand LHS = Op.getOperand(0), RHS = Op.getOperand(1);
// Multiply the even 8-bit parts, producing 16-bit sums.
SDOperand EvenParts = BuildIntrinsicOp(Intrinsic::ppc_altivec_vmuleub,
LHS, RHS, DAG, MVT::v8i16);
EvenParts = DAG.getNode(ISD::BIT_CONVERT, MVT::v16i8, EvenParts);
// Multiply the odd 8-bit parts, producing 16-bit sums.
SDOperand OddParts = BuildIntrinsicOp(Intrinsic::ppc_altivec_vmuloub,
LHS, RHS, DAG, MVT::v8i16);
OddParts = DAG.getNode(ISD::BIT_CONVERT, MVT::v16i8, OddParts);
// Merge the results together.
std::vector<SDOperand> Ops;
for (unsigned i = 0; i != 8; ++i) {
Ops.push_back(DAG.getConstant(2*i+1, MVT::i8));
Ops.push_back(DAG.getConstant(2*i+1+16, MVT::i8));
}
return DAG.getNode(ISD::VECTOR_SHUFFLE, MVT::v16i8, EvenParts, OddParts,
DAG.getNode(ISD::BUILD_VECTOR, MVT::v16i8, Ops));
} else { } else {
assert(0 && "Unknown mul to lower!"); assert(0 && "Unknown mul to lower!");
abort(); abort();

9
lib/Target/PowerPC/README_ALTIVEC.txt
View File

@ -75,15 +75,6 @@ be constants. The verifier should enforce this constraint.
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
Implement multiply for vector integer types, to avoid the horrible scalarized
code produced by legalize.
void test(vector int *X, vector int *Y) {
*X = *X * *Y;
}
//===----------------------------------------------------------------------===//
extract_vector_elt of an arbitrary constant vector can be done with the extract_vector_elt of an arbitrary constant vector can be done with the
following instructions: following instructions: