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Revert 96634. It causes assertion failures for 126.gcc and 176.gcc in

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the armv6 nightly tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96691 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bob Wilson 2010-02-19 18:59:53 +00:00
parent bc02853b89
commit 1a2e8686f8
4 changed files with 6 additions and 28 deletions
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11
include/llvm/Target/TargetRegisterInfo.h
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@ -587,17 +587,6 @@ public:
return !hasFP(MF); return !hasFP(MF);
} }
/// canSimplifyCallFramePseudos - When possible, it's best to simplify the
/// call frame pseudo ops before doing frame index elimination. This is
/// possible only when frame index references between the pseudos won't
/// need adjusted for the call frame adjustments. Normally, that's true
/// if the function has a reserved call frame or a frame pointer. Some
/// targets (Thumb2, for example) may have more complicated criteria,
/// however, and can override this behavior.
virtual bool canSimplifyCallFramePseudos(MachineFunction &MF) const {
return hasReservedCallFrame(MF) || hasFP(MF);
}
/// hasReservedSpillSlot - Return true if target has reserved a spill slot in /// hasReservedSpillSlot - Return true if target has reserved a spill slot in
/// the stack frame of the given function for the specified register. e.g. On /// the stack frame of the given function for the specified register. e.g. On
/// x86, if the frame register is required, the first fixed stack object is /// x86, if the frame register is required, the first fixed stack object is

7
lib/CodeGen/PrologEpilogInserter.cpp
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@ -175,10 +175,9 @@ void PEI::calculateCallsInformation(MachineFunction &Fn) {
MachineBasicBlock::iterator I = *i; MachineBasicBlock::iterator I = *i;
// If call frames are not being included as part of the stack frame, and // If call frames are not being included as part of the stack frame, and
// the target doesn't indicate otherwise, remove the call frame pseudos // there is no dynamic allocation (therefore referencing frame slots off
// here. The sub/add sp instruction pairs are still inserted, but we don't // sp), leave the pseudo ops alone. We'll eliminate them later.
// need to track the SP adjustment for frame index elimination. if (RegInfo->hasReservedCallFrame(Fn) || RegInfo->hasFP(Fn))
if (RegInfo->canSimplifyCallFramePseudos(Fn))
RegInfo->eliminateCallFramePseudoInstr(Fn, *I->getParent(), I); RegInfo->eliminateCallFramePseudoInstr(Fn, *I->getParent(), I);
} }
} }

15
lib/Target/ARM/ARMBaseRegisterInfo.cpp
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@ -1085,16 +1085,6 @@ hasReservedCallFrame(MachineFunction &MF) const {
return !MF.getFrameInfo()->hasVarSizedObjects(); return !MF.getFrameInfo()->hasVarSizedObjects();
} }
// canSimplifyCallFramePseudos - If there is a reserved call frame, the
// call frame pseudos can be simplified. Unlike most targets, having a FP
// is not sufficient here since we still may reference some objects via SP
// even when FP is available in Thumb2 mode.
bool ARMBaseRegisterInfo::
canSimplifyCallFramePseudos(MachineFunction &MF) const {
ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
return hasReservedCallFrame(MF) || (AFI->isThumb1OnlyFunction() && hasFP(MF));
}
static void static void
emitSPUpdate(bool isARM, emitSPUpdate(bool isARM,
MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
@ -1159,6 +1149,7 @@ ARMBaseRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
MachineInstr &MI = *II; MachineInstr &MI = *II;
MachineBasicBlock &MBB = *MI.getParent(); MachineBasicBlock &MBB = *MI.getParent();
MachineFunction &MF = *MBB.getParent(); MachineFunction &MF = *MBB.getParent();
const MachineFrameInfo *MFI = MF.getFrameInfo();
ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>(); ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
assert(!AFI->isThumb1OnlyFunction() && assert(!AFI->isThumb1OnlyFunction() &&
"This eliminateFrameIndex does not support Thumb1!"); "This eliminateFrameIndex does not support Thumb1!");
@ -1169,12 +1160,12 @@ ARMBaseRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
} }
int FrameIndex = MI.getOperand(i).getIndex(); int FrameIndex = MI.getOperand(i).getIndex();
int Offset = MFI->getObjectOffset(FrameIndex) + MFI->getStackSize() + SPAdj;
unsigned FrameReg; unsigned FrameReg;
int Offset = getFrameIndexReference(MF, FrameIndex, FrameReg); Offset = getFrameIndexReference(MF, FrameIndex, FrameReg);
if (FrameReg != ARM::SP) if (FrameReg != ARM::SP)
SPAdj = 0; SPAdj = 0;
Offset += SPAdj;
// Modify MI as necessary to handle as much of 'Offset' as possible // Modify MI as necessary to handle as much of 'Offset' as possible
bool Done = false; bool Done = false;

1
lib/Target/ARM/ARMBaseRegisterInfo.h
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@ -138,7 +138,6 @@ public:
virtual bool requiresFrameIndexScavenging(const MachineFunction &MF) const; virtual bool requiresFrameIndexScavenging(const MachineFunction &MF) const;
virtual bool hasReservedCallFrame(MachineFunction &MF) const; virtual bool hasReservedCallFrame(MachineFunction &MF) const;
virtual bool canSimplifyCallFramePseudos(MachineFunction &MF) const;
virtual void eliminateCallFramePseudoInstr(MachineFunction &MF, virtual void eliminateCallFramePseudoInstr(MachineFunction &MF,
MachineBasicBlock &MBB, MachineBasicBlock &MBB,