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	[mips] Add definition of instruction "drotr32" (double rotate right plus 32).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190232 91177308-0d34-0410-b5e6-96231b3b80d8
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		| @@ -155,6 +155,9 @@ static void LowerLargeShift(MCInst& Inst) { | ||||
|   case Mips::DSRA: | ||||
|     Inst.setOpcode(Mips::DSRA32); | ||||
|     return; | ||||
|   case Mips::DROTR: | ||||
|     Inst.setOpcode(Mips::DROTR32); | ||||
|     return; | ||||
|   } | ||||
| } | ||||
|  | ||||
| @@ -206,6 +209,7 @@ EncodeInstruction(const MCInst &MI, raw_ostream &OS, | ||||
|   case Mips::DSLL: | ||||
|   case Mips::DSRL: | ||||
|   case Mips::DSRA: | ||||
|   case Mips::DROTR: | ||||
|     LowerLargeShift(TmpInst); | ||||
|     break; | ||||
|     // Double extract instruction is chosen by pos and size operands | ||||
|   | ||||
| @@ -111,6 +111,7 @@ let Predicates = [HasMips64r2, HasStdEnc] in { | ||||
|                SRA_FM<0x3a, 1>; | ||||
|   def DROTRV : shift_rotate_reg<"drotrv", GPR64Opnd, rotr>, | ||||
|                SRLV_FM<0x16, 1>; | ||||
|   def DROTR32 : shift_rotate_imm<"drotr32", uimm5, GPR64Opnd>, SRA_FM<0x3e, 1>; | ||||
| } | ||||
|  | ||||
| /// Load and Store Instructions | ||||
|   | ||||
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