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Start making use of RegScavenger.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34708 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2007-02-28 00:21:58 +00:00
parent 5e6df4647e
commit 1b051fc6a4
1 changed files with 12 additions and 8 deletions
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20
lib/Target/ARM/ARMRegisterInfo.cpp
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@ -85,17 +85,13 @@ ARMRegisterInfo::ARMRegisterInfo(const TargetInstrInfo &tii,
: ARMGenRegisterInfo(ARM::ADJCALLSTACKDOWN, ARM::ADJCALLSTACKUP),
TII(tii), STI(sti),
FramePtr(STI.useThumbBacktraces() ? ARM::R7 : ARM::R11) {
RS = new RegScavenger();
RS = (EnableScavenging) ? new RegScavenger() : NULL;
}
ARMRegisterInfo::~ARMRegisterInfo() {
delete RS;
}
RegScavenger *ARMRegisterInfo::getRegScavenger() const {
return EnableScavenging ? RS : NULL;
}
bool ARMRegisterInfo::spillCalleeSavedRegisters(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
const std::vector<CalleeSavedInfo> &CSI) const {
@ -330,6 +326,10 @@ BitVector ARMRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
return Reserved;
}
bool ARMRegisterInfo::requiresRegisterScavenging() const {
return EnableScavenging;
}
/// hasFP - Return true if the specified function should have a dedicated frame
/// pointer register. This is true if the function has variable sized allocas
/// or if frame pointer elimination is disabled.
@ -616,7 +616,8 @@ static void emitThumbConstant(MachineBasicBlock &MBB,
.addReg(DestReg, false, false, true);
}
void ARMRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const{
void ARMRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
RegScavenger *RS) const{
unsigned i = 0;
MachineInstr &MI = *II;
MachineBasicBlock &MBB = *MI.getParent();
@ -898,9 +899,12 @@ void ARMRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const{
// If the offset we have is too large to fit into the instruction, we need
// to form it with a series of ADDri's. Do this by taking 8-bit chunks
// out of 'Offset'.
emitARMRegPlusImmediate(MBB, II, ARM::R12, FrameReg,
unsigned ScratchReg = RS
? RS->FindUnusedReg(&ARM::GPRRegClass, true) : (unsigned)ARM::R12;
assert(ScratchReg != 0 && "Unable to find a free call-clobbered register!");
emitARMRegPlusImmediate(MBB, II, ScratchReg, FrameReg,
isSub ? -Offset : Offset, TII);
MI.getOperand(i).ChangeToRegister(ARM::R12, false, false, true);
MI.getOperand(i).ChangeToRegister(ScratchReg, false, false, true);
}
}