From 1b2983bb232017657b2e56d2b5b1d98d778e0054 Mon Sep 17 00:00:00 2001 From: Chad Rosier Date: Tue, 10 Jan 2012 22:14:06 +0000 Subject: [PATCH] Add missing VEX predicates to VMOVSDto64rr/VMOVSDto64mr. This fixes a few failing test cases on our internal AVX nightly tester. rdar://10663637 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147881 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86InstrSSE.td | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td index 95185f17f53..51cc7f384e5 100644 --- a/lib/Target/X86/X86InstrSSE.td +++ b/lib/Target/X86/X86InstrSSE.td @@ -4544,10 +4544,11 @@ def VMOV64toSDrm : S3SI<0x7E, MRMSrcMem, (outs FR64:$dst), (ins i64mem:$src), VEX; def VMOVSDto64rr : VRPDI<0x7E, MRMDestReg, (outs GR64:$dst), (ins FR64:$src), "mov{d|q}\t{$src, $dst|$dst, $src}", - [(set GR64:$dst, (bitconvert FR64:$src))]>; + [(set GR64:$dst, (bitconvert FR64:$src))]>, VEX; def VMOVSDto64mr : VRPDI<0x7E, MRMDestMem, (outs), (ins i64mem:$dst, FR64:$src), "movq\t{$src, $dst|$dst, $src}", - [(store (i64 (bitconvert FR64:$src)), addr:$dst)]>; + [(store (i64 (bitconvert FR64:$src)), addr:$dst)]>, + VEX; def MOV64toSDrm : S3SI<0x7E, MRMSrcMem, (outs FR64:$dst), (ins i64mem:$src), "movq\t{$src, $dst|$dst, $src}",