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Make handling of conditional stuff much more straightforward

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70767 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Anton Korobeynikov 2009-05-03 13:19:09 +00:00
parent 1fcfb6b6d2
commit 1bb8cd723d
3 changed files with 57 additions and 92 deletions
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111
lib/Target/MSP430/MSP430ISelLowering.cpp
View File

@ -78,13 +78,15 @@ MSP430TargetLowering::MSP430TargetLowering(MSP430TargetMachine &tm) :
setOperationAction(ISD::ExternalSymbol, MVT::i16, Custom); setOperationAction(ISD::ExternalSymbol, MVT::i16, Custom);
setOperationAction(ISD::BR_JT, MVT::Other, Expand); setOperationAction(ISD::BR_JT, MVT::Other, Expand);
setOperationAction(ISD::BRIND, MVT::Other, Expand); setOperationAction(ISD::BRIND, MVT::Other, Expand);
setOperationAction(ISD::BR_CC, MVT::Other, Expand); setOperationAction(ISD::BR_CC, MVT::i8, Custom);
setOperationAction(ISD::BRCOND, MVT::Other, Custom); setOperationAction(ISD::BR_CC, MVT::i16, Custom);
setOperationAction(ISD::SETCC, MVT::i8, Custom); setOperationAction(ISD::BRCOND, MVT::Other, Expand);
setOperationAction(ISD::SETCC, MVT::i16, Custom); setOperationAction(ISD::SETCC, MVT::i8, Expand);
setOperationAction(ISD::SELECT_CC, MVT::Other, Expand); setOperationAction(ISD::SETCC, MVT::i16, Expand);
setOperationAction(ISD::SELECT, MVT::i8, Custom); setOperationAction(ISD::SELECT, MVT::i8, Expand);
setOperationAction(ISD::SELECT, MVT::i16, Custom); setOperationAction(ISD::SELECT, MVT::i16, Expand);
setOperationAction(ISD::SELECT_CC, MVT::i8, Custom);
setOperationAction(ISD::SELECT_CC, MVT::i16, Custom);
setOperationAction(ISD::SIGN_EXTEND, MVT::i16, Custom); setOperationAction(ISD::SIGN_EXTEND, MVT::i16, Custom);
// FIXME: Implement efficiently multiplication by a constant // FIXME: Implement efficiently multiplication by a constant
@ -110,9 +112,8 @@ SDValue MSP430TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) {
case ISD::CALL: return LowerCALL(Op, DAG); case ISD::CALL: return LowerCALL(Op, DAG);
case ISD::GlobalAddress: return LowerGlobalAddress(Op, DAG); case ISD::GlobalAddress: return LowerGlobalAddress(Op, DAG);
case ISD::ExternalSymbol: return LowerExternalSymbol(Op, DAG); case ISD::ExternalSymbol: return LowerExternalSymbol(Op, DAG);
case ISD::SETCC: return LowerSETCC(Op, DAG); case ISD::BR_CC: return LowerBR_CC(Op, DAG);
case ISD::BRCOND: return LowerBRCOND(Op, DAG); case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG);
case ISD::SELECT: return LowerSELECT(Op, DAG);
case ISD::SIGN_EXTEND: return LowerSIGN_EXTEND(Op, DAG); case ISD::SIGN_EXTEND: return LowerSIGN_EXTEND(Op, DAG);
default: default:
assert(0 && "unimplemented operand"); assert(0 && "unimplemented operand");
@ -490,23 +491,14 @@ SDValue MSP430TargetLowering::LowerExternalSymbol(SDValue Op,
return DAG.getNode(MSP430ISD::Wrapper, dl, getPointerTy(), Result);; return DAG.getNode(MSP430ISD::Wrapper, dl, getPointerTy(), Result);;
} }
static SDValue EmitCMP(SDValue &LHS, SDValue &RHS, unsigned &TargetCC,
MVT MSP430TargetLowering::getSetCCResultType(MVT VT) const { ISD::CondCode CC,
return MVT::i8; DebugLoc dl, SelectionDAG &DAG) {
}
SDValue MSP430TargetLowering::LowerSETCC(SDValue Op, SelectionDAG &DAG) {
assert(Op.getValueType() == MVT::i8 && "SetCC type must be 8-bit integer");
SDValue LHS = Op.getOperand(0);
SDValue RHS = Op.getOperand(1);
DebugLoc dl = Op.getDebugLoc();
ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get();
// FIXME: Handle bittests someday // FIXME: Handle bittests someday
assert(!LHS.getValueType().isFloatingPoint() && "We don't handle FP yet"); assert(!LHS.getValueType().isFloatingPoint() && "We don't handle FP yet");
// FIXME: Handle jump negative someday // FIXME: Handle jump negative someday
unsigned TargetCC = 0; TargetCC = MSP430::COND_INVALID;
switch (CC) { switch (CC) {
default: assert(0 && "Invalid integer condition!"); default: assert(0 && "Invalid integer condition!");
case ISD::SETEQ: case ISD::SETEQ:
@ -537,66 +529,46 @@ SDValue MSP430TargetLowering::LowerSETCC(SDValue Op, SelectionDAG &DAG) {
break; break;
} }
SDValue Cond = DAG.getNode(MSP430ISD::CMP, dl, MVT::i16, LHS, RHS); return DAG.getNode(MSP430ISD::CMP, dl, MVT::Flag, LHS, RHS);
return DAG.getNode(MSP430ISD::SETCC, dl, MVT::i8,
DAG.getConstant(TargetCC, MVT::i8), Cond);
} }
SDValue MSP430TargetLowering::LowerBRCOND(SDValue Op, SelectionDAG &DAG) {
SDValue MSP430TargetLowering::LowerBR_CC(SDValue Op, SelectionDAG &DAG) {
SDValue Chain = Op.getOperand(0); SDValue Chain = Op.getOperand(0);
SDValue Cond = Op.getOperand(1); ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get();
SDValue Dest = Op.getOperand(2); SDValue LHS = Op.getOperand(2);
SDValue RHS = Op.getOperand(3);
SDValue Dest = Op.getOperand(4);
DebugLoc dl = Op.getDebugLoc(); DebugLoc dl = Op.getDebugLoc();
SDValue CC;
// Lower condition if not lowered yet unsigned TargetCC = MSP430::COND_INVALID;
if (Cond.getOpcode() == ISD::SETCC) SDValue Flag = EmitCMP(LHS, RHS, TargetCC, CC, dl, DAG);
Cond = LowerSETCC(Cond, DAG);
// If condition flag is set by a MSP430ISD::CMP, then use it as the condition return DAG.getNode(MSP430ISD::BR_CC, dl, Op.getValueType(),
// setting operand in place of the MSP430ISD::SETCC. Chain,
if (Cond.getOpcode() == MSP430ISD::SETCC) { Dest, DAG.getConstant(TargetCC, MVT::i8),
CC = Cond.getOperand(0); Flag);
Cond = Cond.getOperand(1);
} else
assert(0 && "Unimplemented condition!");
return DAG.getNode(MSP430ISD::BRCOND, dl, Op.getValueType(),
Chain, Dest, CC, Cond);
} }
SDValue MSP430TargetLowering::LowerSELECT(SDValue Op, SelectionDAG &DAG) { SDValue MSP430TargetLowering::LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) {
SDValue Cond = Op.getOperand(0); SDValue LHS = Op.getOperand(0);
SDValue TrueV = Op.getOperand(1); SDValue RHS = Op.getOperand(1);
SDValue FalseV = Op.getOperand(2); SDValue TrueV = Op.getOperand(2);
SDValue FalseV = Op.getOperand(3);
ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get();
DebugLoc dl = Op.getDebugLoc(); DebugLoc dl = Op.getDebugLoc();
SDValue CC;
// Lower condition if not lowered yet unsigned TargetCC = MSP430::COND_INVALID;
if (Cond.getOpcode() == ISD::SETCC) SDValue Flag = EmitCMP(LHS, RHS, TargetCC, CC, dl, DAG);
Cond = LowerSETCC(Cond, DAG);
// If condition flag is set by a MSP430ISD::CMP, then use it as the condition
// setting operand in place of the MSP430ISD::SETCC.
if (Cond.getOpcode() == MSP430ISD::SETCC) {
CC = Cond.getOperand(0);
Cond = Cond.getOperand(1);
TrueV = Cond.getOperand(0);
FalseV = Cond.getOperand(1);
} else {
CC = DAG.getConstant(MSP430::COND_NE, MVT::i16);
Cond = DAG.getNode(MSP430ISD::CMP, dl, MVT::i16,
Cond, DAG.getConstant(0, MVT::i16));
}
SDVTList VTs = DAG.getVTList(Op.getValueType(), MVT::Flag); SDVTList VTs = DAG.getVTList(Op.getValueType(), MVT::Flag);
SmallVector<SDValue, 4> Ops; SmallVector<SDValue, 4> Ops;
Ops.push_back(TrueV); Ops.push_back(TrueV);
Ops.push_back(FalseV); Ops.push_back(FalseV);
Ops.push_back(CC); Ops.push_back(DAG.getConstant(TargetCC, MVT::i8));
Ops.push_back(Cond); Ops.push_back(Flag);
return DAG.getNode(MSP430ISD::SELECT, dl, VTs, &Ops[0], Ops.size()); return DAG.getNode(MSP430ISD::SELECT_CC, dl, VTs, &Ops[0], Ops.size());
} }
SDValue MSP430TargetLowering::LowerSIGN_EXTEND(SDValue Op, SDValue MSP430TargetLowering::LowerSIGN_EXTEND(SDValue Op,
@ -621,10 +593,9 @@ const char *MSP430TargetLowering::getTargetNodeName(unsigned Opcode) const {
case MSP430ISD::RRC: return "MSP430ISD::RRC"; case MSP430ISD::RRC: return "MSP430ISD::RRC";
case MSP430ISD::CALL: return "MSP430ISD::CALL"; case MSP430ISD::CALL: return "MSP430ISD::CALL";
case MSP430ISD::Wrapper: return "MSP430ISD::Wrapper"; case MSP430ISD::Wrapper: return "MSP430ISD::Wrapper";
case MSP430ISD::BRCOND: return "MSP430ISD::BRCOND"; case MSP430ISD::BR_CC: return "MSP430ISD::BR_CC";
case MSP430ISD::CMP: return "MSP430ISD::CMP"; case MSP430ISD::CMP: return "MSP430ISD::CMP";
case MSP430ISD::SETCC: return "MSP430ISD::SETCC"; case MSP430ISD::SELECT_CC: return "MSP430ISD::SELECT_CC";
case MSP430ISD::SELECT: return "MSP430ISD::SELECT";
} }
} }

15
lib/Target/MSP430/MSP430ISelLowering.h
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@ -52,11 +52,11 @@ namespace llvm {
/// is the block to branch if condition is true, operand 2 is the /// is the block to branch if condition is true, operand 2 is the
/// condition code, and operand 3 is the flag operand produced by a CMP /// condition code, and operand 3 is the flag operand produced by a CMP
/// instruction. /// instruction.
BRCOND, BR_CC,
/// SELECT. Operand 0 and operand 1 are selection variable, operand 3 is /// SELECT_CC. Operand 0 and operand 1 are selection variable, operand 3
/// condition code and operand 4 is flag operand. /// is condition code and operand 4 is flag operand.
SELECT SELECT_CC
}; };
} }
@ -74,8 +74,6 @@ namespace llvm {
/// DAG node. /// DAG node.
virtual const char *getTargetNodeName(unsigned Opcode) const; virtual const char *getTargetNodeName(unsigned Opcode) const;
virtual MVT getSetCCResultType(MVT VT) const;
SDValue LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG); SDValue LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG);
SDValue LowerCALL(SDValue Op, SelectionDAG &DAG); SDValue LowerCALL(SDValue Op, SelectionDAG &DAG);
SDValue LowerRET(SDValue Op, SelectionDAG &DAG); SDValue LowerRET(SDValue Op, SelectionDAG &DAG);
@ -83,9 +81,8 @@ namespace llvm {
SDValue LowerShifts(SDValue Op, SelectionDAG &DAG); SDValue LowerShifts(SDValue Op, SelectionDAG &DAG);
SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG); SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG);
SDValue LowerExternalSymbol(SDValue Op, SelectionDAG &DAG); SDValue LowerExternalSymbol(SDValue Op, SelectionDAG &DAG);
SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG); SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG);
SDValue LowerBRCOND(SDValue Op, SelectionDAG &DAG); SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG);
SDValue LowerSELECT(SDValue Op, SelectionDAG &DAG);
SDValue LowerSIGN_EXTEND(SDValue Op, SelectionDAG &DAG); SDValue LowerSIGN_EXTEND(SDValue Op, SelectionDAG &DAG);
SDValue LowerCCCCallTo(SDValue Op, SelectionDAG &DAG, SDValue LowerCCCCallTo(SDValue Op, SelectionDAG &DAG,

21
lib/Target/MSP430/MSP430InstrInfo.td
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@ -26,13 +26,11 @@ def SDT_MSP430Call : SDTypeProfile<0, -1, [SDTCisVT<0, iPTR>]>;
def SDT_MSP430CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i16>]>; def SDT_MSP430CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i16>]>;
def SDT_MSP430CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i16>, SDTCisVT<1, i16>]>; def SDT_MSP430CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i16>, SDTCisVT<1, i16>]>;
def SDT_MSP430Wrapper : SDTypeProfile<1, 1, [SDTCisSameAs<0, 1>, SDTCisPtrTy<0>]>; def SDT_MSP430Wrapper : SDTypeProfile<1, 1, [SDTCisSameAs<0, 1>, SDTCisPtrTy<0>]>;
def SDT_MSP430SetCC : SDTypeProfile<1, 2, [SDTCisVT<0, i8>,
SDTCisVT<1, i8>, SDTCisVT<2, i16>]>;
def SDT_MSP430Cmp : SDTypeProfile<0, 2, [SDTCisSameAs<0, 1>]>; def SDT_MSP430Cmp : SDTypeProfile<0, 2, [SDTCisSameAs<0, 1>]>;
def SDT_MSP430BrCond : SDTypeProfile<0, 3, [SDTCisVT<0, OtherVT>, def SDT_MSP430BrCC : SDTypeProfile<0, 2, [SDTCisVT<0, OtherVT>,
SDTCisVT<1, i8>, SDTCisVT<2, i16>]>; SDTCisVT<1, i8>]>;
def SDT_MSP430Select : SDTypeProfile<1, 4, [SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>, def SDT_MSP430SelectCC : SDTypeProfile<1, 3, [SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>,
SDTCisVT<3, i8>, SDTCisVT<4, i16>]>; SDTCisVT<3, i8>]>;
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// MSP430 Specific Node Definitions. // MSP430 Specific Node Definitions.
@ -53,10 +51,9 @@ def MSP430callseq_end :
SDNode<"ISD::CALLSEQ_END", SDT_MSP430CallSeqEnd, SDNode<"ISD::CALLSEQ_END", SDT_MSP430CallSeqEnd,
[SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>; [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>;
def MSP430Wrapper : SDNode<"MSP430ISD::Wrapper", SDT_MSP430Wrapper>; def MSP430Wrapper : SDNode<"MSP430ISD::Wrapper", SDT_MSP430Wrapper>;
def MSP430setcc : SDNode<"MSP430ISD::SETCC", SDT_MSP430SetCC>; def MSP430cmp : SDNode<"MSP430ISD::CMP", SDT_MSP430Cmp, [SDNPOutFlag]>;
def MSP430cmp : SDNode<"MSP430ISD::CMP", SDT_MSP430Cmp>; def MSP430brcc : SDNode<"MSP430ISD::BR_CC", SDT_MSP430BrCC, [SDNPHasChain, SDNPInFlag]>;
def MSP430brcond : SDNode<"MSP430ISD::BRCOND", SDT_MSP430BrCond, [SDNPHasChain]>; def MSP430selectcc: SDNode<"MSP430ISD::SELECT_CC", SDT_MSP430SelectCC, [SDNPInFlag]>;
def MSP430select : SDNode<"MSP430ISD::SELECT", SDT_MSP430Select>;
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// MSP430 Operand Definitions. // MSP430 Operand Definitions.
@ -113,7 +110,7 @@ let usesCustomDAGSchedInserter = 1 in {
def Select16 : Pseudo<(outs GR16:$dst), (ins GR16:$src1, GR16:$src2, i8imm:$cc), def Select16 : Pseudo<(outs GR16:$dst), (ins GR16:$src1, GR16:$src2, i8imm:$cc),
"# Select16 PSEUDO", "# Select16 PSEUDO",
[(set GR16:$dst, [(set GR16:$dst,
(MSP430select GR16:$src1, GR16:$src2, imm:$cc, SRW))]>; (MSP430selectcc GR16:$src1, GR16:$src2, imm:$cc))]>;
} }
let neverHasSideEffects = 1 in let neverHasSideEffects = 1 in
@ -140,7 +137,7 @@ let isBarrier = 1 in
let Uses = [SRW] in let Uses = [SRW] in
def JCC : Pseudo<(outs), (ins brtarget:$dst, cc:$cc), def JCC : Pseudo<(outs), (ins brtarget:$dst, cc:$cc),
"j$cc $dst", "j$cc $dst",
[(MSP430brcond bb:$dst, imm:$cc, SRW)]>; [(MSP430brcc bb:$dst, imm:$cc)]>;
} // isBranch, isTerminator } // isBranch, isTerminator
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//