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Check for all known bits on ret in InstCombine

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From a combination of @llvm.assume calls (and perhaps through other means, such
as range metadata), it is possible that all bits of a return value might be
known. Previously, InstCombine did not check for this (which is understandable
given assumptions of constant propagation), but means that we'd miss simple
cases where assumptions are involved.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217346 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Hal Finkel 2014-09-07 21:28:34 +00:00
parent 3ef1aae2b5
commit 1c0c67a007
3 changed files with 31 additions and 0 deletions
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1
lib/Transforms/InstCombine/InstCombine.h
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@ -232,6 +232,7 @@ public:
Instruction *visitStoreInst(StoreInst &SI);
Instruction *visitBranchInst(BranchInst &BI);
Instruction *visitSwitchInst(SwitchInst &SI);
Instruction *visitReturnInst(ReturnInst &RI);
Instruction *visitInsertValueInst(InsertValueInst &IV);
Instruction *visitInsertElementInst(InsertElementInst &IE);
Instruction *visitExtractElementInst(ExtractElementInst &EI);

18
lib/Transforms/InstCombine/InstructionCombining.cpp
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@ -2004,7 +2004,25 @@ Instruction *InstCombiner::visitFree(CallInst &FI) {
return nullptr;
}
Instruction *InstCombiner::visitReturnInst(ReturnInst &RI) {
if (RI.getNumOperands() == 0) // ret void
return nullptr;
Value *ResultOp = RI.getOperand(0);
Type *VTy = ResultOp->getType();
if (!VTy->isIntegerTy())
return nullptr;
// There might be assume intrinsics dominating this return that completely
// determine the value. If so, constant fold it.
unsigned BitWidth = VTy->getPrimitiveSizeInBits();
APInt KnownZero(BitWidth, 0), KnownOne(BitWidth, 0);
computeKnownBits(ResultOp, KnownZero, KnownOne, 0, &RI);
if ((KnownZero|KnownOne).isAllOnesValue())
RI.setOperand(0, Constant::getIntegerValue(VTy, KnownOne));
return nullptr;
}
Instruction *InstCombiner::visitBranchInst(BranchInst &BI) {
// Change br (not X), label True, label False to: br X, label False, True

12
test/Transforms/InstCombine/assume.ll
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@ -43,6 +43,18 @@ entry:
; Function Attrs: nounwind
declare void @llvm.assume(i1) #1
define i32 @simple(i32 %a) #1 {
entry:
; CHECK-LABEL: @simple
; CHECK: call void @llvm.assume
; CHECK: ret i32 4
%cmp = icmp eq i32 %a, 4
tail call void @llvm.assume(i1 %cmp)
ret i32 %a
}
; Function Attrs: nounwind uwtable
define i32 @can1(i1 %a, i1 %b, i1 %c) {
entry: