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"Fix" PR2762. The testcase now crashes codegen

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elsewhere due to a missing pattern for
v2f64 = sint_to_fp v2i32.  That is PR2687.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55828 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Duncan Sands 2008-09-05 08:13:35 +00:00
parent 3dd168d445
commit 1c11debc94
1 changed files with 19 additions and 1 deletions
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20
lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
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@ -524,7 +524,25 @@ void DAGTypeLegalizer::SplitVecRes_UnaryOp(SDNode *N, SDValue &Lo,
MVT LoVT, HiVT;
GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
GetSplitVector(N->getOperand(0), Lo, Hi);
// Split the input.
MVT InVT = N->getOperand(0).getValueType();
switch (getTypeAction(InVT)) {
default: assert(0 && "Unexpected type action!");
case Legal: {
assert(LoVT == HiVT && "Legal non-power-of-two vector type?");
MVT InNVT = MVT::getVectorVT(InVT.getVectorElementType(),
LoVT.getVectorNumElements());
Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, InNVT, N->getOperand(0),
DAG.getIntPtrConstant(0));
Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, InNVT, N->getOperand(0),
DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
break;
}
case SplitVector:
GetSplitVector(N->getOperand(0), Lo, Hi);
break;
}
Lo = DAG.getNode(N->getOpcode(), LoVT, Lo);
Hi = DAG.getNode(N->getOpcode(), HiVT, Hi);
}