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https://github.com/c64scene-ar/llvm-6502.git
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Return 0 instead of false.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168076 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2154,13 +2154,13 @@ unsigned X86FastISel::TargetMaterializeAlloca(const AllocaInst *C) {
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unsigned X86FastISel::TargetMaterializeFloatZero(const ConstantFP *CF) {
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unsigned X86FastISel::TargetMaterializeFloatZero(const ConstantFP *CF) {
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MVT VT;
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MVT VT;
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if (!isTypeLegal(CF->getType(), VT))
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if (!isTypeLegal(CF->getType(), VT))
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return false;
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return 0;
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// Get opcode and regclass for the given zero.
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// Get opcode and regclass for the given zero.
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unsigned Opc = 0;
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unsigned Opc = 0;
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const TargetRegisterClass *RC = NULL;
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const TargetRegisterClass *RC = NULL;
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switch (VT.SimpleTy) {
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switch (VT.SimpleTy) {
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default: return false;
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default: return 0;
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case MVT::f32:
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case MVT::f32:
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if (X86ScalarSSEf32) {
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if (X86ScalarSSEf32) {
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Opc = X86::FsFLD0SS;
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Opc = X86::FsFLD0SS;
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@ -2181,7 +2181,7 @@ unsigned X86FastISel::TargetMaterializeFloatZero(const ConstantFP *CF) {
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break;
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break;
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case MVT::f80:
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case MVT::f80:
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// No f80 support yet.
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// No f80 support yet.
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return false;
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return 0;
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}
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}
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unsigned ResultReg = createResultReg(RC);
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unsigned ResultReg = createResultReg(RC);
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