mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-28 04:33:05 +00:00
Added some basic test cases for r61209
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61210 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Mon P Wang
parent
87c8a8f304
commit
1d045486ca
48
test/CodeGen/X86/widen_arith-1.ll
Normal file
48
test/CodeGen/X86/widen_arith-1.ll
Normal file
@ -0,0 +1,48 @@
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; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t -f
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; RUN: grep paddb %t | count 1
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; RUN: grep pextrb %t | count 1
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; RUN: grep pextrw %t | count 1
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; Widen a v3i8 to v16i8 to use a vector add
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
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define void @update(<3 x i8>* %dst, <3 x i8>* %src, i32 %n) nounwind {
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entry:
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%dst.addr = alloca <3 x i8>* ; <<3 x i8>**> [#uses=2]
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%src.addr = alloca <3 x i8>* ; <<3 x i8>**> [#uses=2]
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%n.addr = alloca i32 ; <i32*> [#uses=2]
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%i = alloca i32, align 4 ; <i32*> [#uses=6]
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store <3 x i8>* %dst, <3 x i8>** %dst.addr
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store <3 x i8>* %src, <3 x i8>** %src.addr
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store i32 %n, i32* %n.addr
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store i32 0, i32* %i
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br label %forcond
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forcond: ; preds = %forinc, %entry
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%tmp = load i32* %i ; <i32> [#uses=1]
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%tmp1 = load i32* %n.addr ; <i32> [#uses=1]
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%cmp = icmp slt i32 %tmp, %tmp1 ; <i1> [#uses=1]
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br i1 %cmp, label %forbody, label %afterfor
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forbody: ; preds = %forcond
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%tmp2 = load i32* %i ; <i32> [#uses=1]
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%tmp3 = load <3 x i8>** %dst.addr ; <<3 x i8>*> [#uses=1]
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%arrayidx = getelementptr <3 x i8>* %tmp3, i32 %tmp2 ; <<3 x i8>*> [#uses=1]
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%tmp4 = load i32* %i ; <i32> [#uses=1]
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%tmp5 = load <3 x i8>** %src.addr ; <<3 x i8>*> [#uses=1]
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%arrayidx6 = getelementptr <3 x i8>* %tmp5, i32 %tmp4 ; <<3 x i8>*> [#uses=1]
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%tmp7 = load <3 x i8>* %arrayidx6 ; <<3 x i8>> [#uses=1]
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%add = add <3 x i8> %tmp7, < i8 1, i8 1, i8 1 > ; <<3 x i8>> [#uses=1]
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store <3 x i8> %add, <3 x i8>* %arrayidx
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br label %forinc
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forinc: ; preds = %forbody
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%tmp8 = load i32* %i ; <i32> [#uses=1]
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%inc = add i32 %tmp8, 1 ; <i32> [#uses=1]
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store i32 %inc, i32* %i
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br label %forcond
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afterfor: ; preds = %forcond
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ret void
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}
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60
test/CodeGen/X86/widen_arith-2.ll
Normal file
60
test/CodeGen/X86/widen_arith-2.ll
Normal file
@ -0,0 +1,60 @@
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; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t -f
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; RUN: grep paddb %t | count 1
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; RUN: grep pand %t | count 1
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; widen v8i8 to v16i8 (checks even power of 2 widening with add & and)
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
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define void @update(i64* %dst_i, i64* %src_i, i32 %n) nounwind {
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entry:
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%dst_i.addr = alloca i64* ; <i64**> [#uses=2]
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%src_i.addr = alloca i64* ; <i64**> [#uses=2]
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%n.addr = alloca i32 ; <i32*> [#uses=2]
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%i = alloca i32, align 4 ; <i32*> [#uses=8]
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%dst = alloca <8 x i8>*, align 4 ; <<8 x i8>**> [#uses=2]
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%src = alloca <8 x i8>*, align 4 ; <<8 x i8>**> [#uses=2]
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store i64* %dst_i, i64** %dst_i.addr
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store i64* %src_i, i64** %src_i.addr
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store i32 %n, i32* %n.addr
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store i32 0, i32* %i
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br label %forcond
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forcond: ; preds = %forinc, %entry
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%tmp = load i32* %i ; <i32> [#uses=1]
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%tmp1 = load i32* %n.addr ; <i32> [#uses=1]
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%cmp = icmp slt i32 %tmp, %tmp1 ; <i1> [#uses=1]
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br i1 %cmp, label %forbody, label %afterfor
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forbody: ; preds = %forcond
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%tmp2 = load i32* %i ; <i32> [#uses=1]
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%tmp3 = load i64** %dst_i.addr ; <i64*> [#uses=1]
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%arrayidx = getelementptr i64* %tmp3, i32 %tmp2 ; <i64*> [#uses=1]
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%conv = bitcast i64* %arrayidx to <8 x i8>* ; <<8 x i8>*> [#uses=1]
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store <8 x i8>* %conv, <8 x i8>** %dst
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%tmp4 = load i32* %i ; <i32> [#uses=1]
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%tmp5 = load i64** %src_i.addr ; <i64*> [#uses=1]
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%arrayidx6 = getelementptr i64* %tmp5, i32 %tmp4 ; <i64*> [#uses=1]
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%conv7 = bitcast i64* %arrayidx6 to <8 x i8>* ; <<8 x i8>*> [#uses=1]
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store <8 x i8>* %conv7, <8 x i8>** %src
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%tmp8 = load i32* %i ; <i32> [#uses=1]
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%tmp9 = load <8 x i8>** %dst ; <<8 x i8>*> [#uses=1]
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%arrayidx10 = getelementptr <8 x i8>* %tmp9, i32 %tmp8 ; <<8 x i8>*> [#uses=1]
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%tmp11 = load i32* %i ; <i32> [#uses=1]
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%tmp12 = load <8 x i8>** %src ; <<8 x i8>*> [#uses=1]
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%arrayidx13 = getelementptr <8 x i8>* %tmp12, i32 %tmp11 ; <<8 x i8>*> [#uses=1]
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%tmp14 = load <8 x i8>* %arrayidx13 ; <<8 x i8>> [#uses=1]
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%add = add <8 x i8> %tmp14, < i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1 > ; <<8 x i8>> [#uses=1]
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%and = and <8 x i8> %add, < i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4 > ; <<8 x i8>> [#uses=1]
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store <8 x i8> %and, <8 x i8>* %arrayidx10
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br label %forinc
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forinc: ; preds = %forbody
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%tmp15 = load i32* %i ; <i32> [#uses=1]
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%inc = add i32 %tmp15, 1 ; <i32> [#uses=1]
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store i32 %inc, i32* %i
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br label %forcond
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afterfor: ; preds = %forcond
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ret void
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}
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54
test/CodeGen/X86/widen_arith-3.ll
Normal file
54
test/CodeGen/X86/widen_arith-3.ll
Normal file
@ -0,0 +1,54 @@
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; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t -f
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; RUN: grep paddw %t | count 1
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; RUN: grep movd %t | count 2
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; RUN: grep pextrw %t | count 1
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; Widen a v3i16 to v8i16 to do a vector add
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
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target triple = "i686-apple-darwin10.0.0d2"
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@.str = internal constant [4 x i8] c"%d \00" ; <[4 x i8]*> [#uses=1]
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@.str1 = internal constant [2 x i8] c"\0A\00" ; <[2 x i8]*> [#uses=1]
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define void @update(<3 x i16>* %dst, <3 x i16>* %src, i32 %n) nounwind {
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entry:
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%dst.addr = alloca <3 x i16>* ; <<3 x i16>**> [#uses=2]
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%src.addr = alloca <3 x i16>* ; <<3 x i16>**> [#uses=2]
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%n.addr = alloca i32 ; <i32*> [#uses=2]
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%v = alloca <3 x i16>, align 8 ; <<3 x i16>*> [#uses=1]
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%i = alloca i32, align 4 ; <i32*> [#uses=6]
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store <3 x i16>* %dst, <3 x i16>** %dst.addr
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store <3 x i16>* %src, <3 x i16>** %src.addr
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store i32 %n, i32* %n.addr
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store <3 x i16> < i16 1, i16 1, i16 1 >, <3 x i16>* %v
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store i32 0, i32* %i
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br label %forcond
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forcond: ; preds = %forinc, %entry
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%tmp = load i32* %i ; <i32> [#uses=1]
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%tmp1 = load i32* %n.addr ; <i32> [#uses=1]
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%cmp = icmp slt i32 %tmp, %tmp1 ; <i1> [#uses=1]
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br i1 %cmp, label %forbody, label %afterfor
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forbody: ; preds = %forcond
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%tmp2 = load i32* %i ; <i32> [#uses=1]
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%tmp3 = load <3 x i16>** %dst.addr ; <<3 x i16>*> [#uses=1]
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%arrayidx = getelementptr <3 x i16>* %tmp3, i32 %tmp2 ; <<3 x i16>*> [#uses=1]
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%tmp4 = load i32* %i ; <i32> [#uses=1]
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%tmp5 = load <3 x i16>** %src.addr ; <<3 x i16>*> [#uses=1]
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%arrayidx6 = getelementptr <3 x i16>* %tmp5, i32 %tmp4 ; <<3 x i16>*> [#uses=1]
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%tmp7 = load <3 x i16>* %arrayidx6 ; <<3 x i16>> [#uses=1]
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%add = add <3 x i16> %tmp7, < i16 1, i16 1, i16 1 > ; <<3 x i16>> [#uses=1]
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store <3 x i16> %add, <3 x i16>* %arrayidx
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br label %forinc
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forinc: ; preds = %forbody
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%tmp8 = load i32* %i ; <i32> [#uses=1]
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%inc = add i32 %tmp8, 1 ; <i32> [#uses=1]
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store i32 %inc, i32* %i
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br label %forcond
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afterfor: ; preds = %forcond
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ret void
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}
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51
test/CodeGen/X86/widen_arith-4.ll
Normal file
51
test/CodeGen/X86/widen_arith-4.ll
Normal file
@ -0,0 +1,51 @@
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; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t -f
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; RUN: grep psubw %t | count 1
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; RUN: grep pmullw %t | count 1
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; Widen a v5i16 to v8i16 to do a vector sub and multiple
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
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define void @update(<5 x i16>* %dst, <5 x i16>* %src, i32 %n) nounwind {
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entry:
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%dst.addr = alloca <5 x i16>* ; <<5 x i16>**> [#uses=2]
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%src.addr = alloca <5 x i16>* ; <<5 x i16>**> [#uses=2]
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%n.addr = alloca i32 ; <i32*> [#uses=2]
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%v = alloca <5 x i16>, align 16 ; <<5 x i16>*> [#uses=1]
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%i = alloca i32, align 4 ; <i32*> [#uses=6]
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store <5 x i16>* %dst, <5 x i16>** %dst.addr
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store <5 x i16>* %src, <5 x i16>** %src.addr
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store i32 %n, i32* %n.addr
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store <5 x i16> < i16 1, i16 1, i16 1, i16 0, i16 0 >, <5 x i16>* %v
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store i32 0, i32* %i
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br label %forcond
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forcond: ; preds = %forinc, %entry
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%tmp = load i32* %i ; <i32> [#uses=1]
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%tmp1 = load i32* %n.addr ; <i32> [#uses=1]
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%cmp = icmp slt i32 %tmp, %tmp1 ; <i1> [#uses=1]
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br i1 %cmp, label %forbody, label %afterfor
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forbody: ; preds = %forcond
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%tmp2 = load i32* %i ; <i32> [#uses=1]
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%tmp3 = load <5 x i16>** %dst.addr ; <<5 x i16>*> [#uses=1]
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%arrayidx = getelementptr <5 x i16>* %tmp3, i32 %tmp2 ; <<5 x i16>*> [#uses=1]
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%tmp4 = load i32* %i ; <i32> [#uses=1]
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%tmp5 = load <5 x i16>** %src.addr ; <<5 x i16>*> [#uses=1]
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%arrayidx6 = getelementptr <5 x i16>* %tmp5, i32 %tmp4 ; <<5 x i16>*> [#uses=1]
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%tmp7 = load <5 x i16>* %arrayidx6 ; <<5 x i16>> [#uses=1]
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%sub = sub <5 x i16> %tmp7, < i16 271, i16 271, i16 271, i16 271, i16 271 > ; <<5 x i16>> [#uses=1]
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%mul = mul <5 x i16> %sub, < i16 2, i16 2, i16 2, i16 2, i16 2 > ; <<5 x i16>> [#uses=1]
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store <5 x i16> %mul, <5 x i16>* %arrayidx
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br label %forinc
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forinc: ; preds = %forbody
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%tmp8 = load i32* %i ; <i32> [#uses=1]
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%inc = add i32 %tmp8, 1 ; <i32> [#uses=1]
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store i32 %inc, i32* %i
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br label %forcond
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afterfor: ; preds = %forcond
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ret void
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}
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51
test/CodeGen/X86/widen_arith-5.ll
Normal file
51
test/CodeGen/X86/widen_arith-5.ll
Normal file
@ -0,0 +1,51 @@
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; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t -f
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; RUN: grep pmulld %t | count 1
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; RUN: grep psubd %t | count 1
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; RUN: grep movaps %t | count 1
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; widen a v3i32 to v4i32 to do a vector multiple and a subtraction
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
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define void @update(<3 x i32>* %dst, <3 x i32>* %src, i32 %n) nounwind {
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entry:
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%dst.addr = alloca <3 x i32>* ; <<3 x i32>**> [#uses=2]
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%src.addr = alloca <3 x i32>* ; <<3 x i32>**> [#uses=2]
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%n.addr = alloca i32 ; <i32*> [#uses=2]
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%v = alloca <3 x i32>, align 16 ; <<3 x i32>*> [#uses=1]
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%i = alloca i32, align 4 ; <i32*> [#uses=6]
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store <3 x i32>* %dst, <3 x i32>** %dst.addr
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store <3 x i32>* %src, <3 x i32>** %src.addr
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store i32 %n, i32* %n.addr
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store <3 x i32> < i32 1, i32 1, i32 1 >, <3 x i32>* %v
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store i32 0, i32* %i
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br label %forcond
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forcond: ; preds = %forinc, %entry
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%tmp = load i32* %i ; <i32> [#uses=1]
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%tmp1 = load i32* %n.addr ; <i32> [#uses=1]
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%cmp = icmp slt i32 %tmp, %tmp1 ; <i1> [#uses=1]
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br i1 %cmp, label %forbody, label %afterfor
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forbody: ; preds = %forcond
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%tmp2 = load i32* %i ; <i32> [#uses=1]
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%tmp3 = load <3 x i32>** %dst.addr ; <<3 x i32>*> [#uses=1]
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%arrayidx = getelementptr <3 x i32>* %tmp3, i32 %tmp2 ; <<3 x i32>*> [#uses=1]
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%tmp4 = load i32* %i ; <i32> [#uses=1]
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%tmp5 = load <3 x i32>** %src.addr ; <<3 x i32>*> [#uses=1]
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%arrayidx6 = getelementptr <3 x i32>* %tmp5, i32 %tmp4 ; <<3 x i32>*> [#uses=1]
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%tmp7 = load <3 x i32>* %arrayidx6 ; <<3 x i32>> [#uses=1]
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%mul = mul <3 x i32> %tmp7, < i32 4, i32 4, i32 4 > ; <<3 x i32>> [#uses=1]
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%sub = sub <3 x i32> %mul, < i32 3, i32 3, i32 3 > ; <<3 x i32>> [#uses=1]
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store <3 x i32> %sub, <3 x i32>* %arrayidx
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br label %forinc
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forinc: ; preds = %forbody
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%tmp8 = load i32* %i ; <i32> [#uses=1]
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%inc = add i32 %tmp8, 1 ; <i32> [#uses=1]
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store i32 %inc, i32* %i
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br label %forcond
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afterfor: ; preds = %forcond
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ret void
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}
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50
test/CodeGen/X86/widen_arith-6.ll
Normal file
50
test/CodeGen/X86/widen_arith-6.ll
Normal file
@ -0,0 +1,50 @@
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; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t -f
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; RUN: grep mulps %t | count 1
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; RUN: grep addps %t | count 1
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; widen a v3f32 to vfi32 to do a vector multiple and an add
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
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define void @update(<3 x float>* %dst, <3 x float>* %src, i32 %n) nounwind {
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entry:
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%dst.addr = alloca <3 x float>* ; <<3 x float>**> [#uses=2]
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%src.addr = alloca <3 x float>* ; <<3 x float>**> [#uses=2]
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%n.addr = alloca i32 ; <i32*> [#uses=2]
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%v = alloca <3 x float>, align 16 ; <<3 x float>*> [#uses=2]
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%i = alloca i32, align 4 ; <i32*> [#uses=6]
|
||||
store <3 x float>* %dst, <3 x float>** %dst.addr
|
||||
store <3 x float>* %src, <3 x float>** %src.addr
|
||||
store i32 %n, i32* %n.addr
|
||||
store <3 x float> < float 1.000000e+00, float 2.000000e+00, float 3.000000e+00 >, <3 x float>* %v
|
||||
store i32 0, i32* %i
|
||||
br label %forcond
|
||||
|
||||
forcond: ; preds = %forinc, %entry
|
||||
%tmp = load i32* %i ; <i32> [#uses=1]
|
||||
%tmp1 = load i32* %n.addr ; <i32> [#uses=1]
|
||||
%cmp = icmp slt i32 %tmp, %tmp1 ; <i1> [#uses=1]
|
||||
br i1 %cmp, label %forbody, label %afterfor
|
||||
|
||||
forbody: ; preds = %forcond
|
||||
%tmp2 = load i32* %i ; <i32> [#uses=1]
|
||||
%tmp3 = load <3 x float>** %dst.addr ; <<3 x float>*> [#uses=1]
|
||||
%arrayidx = getelementptr <3 x float>* %tmp3, i32 %tmp2 ; <<3 x float>*> [#uses=1]
|
||||
%tmp4 = load i32* %i ; <i32> [#uses=1]
|
||||
%tmp5 = load <3 x float>** %src.addr ; <<3 x float>*> [#uses=1]
|
||||
%arrayidx6 = getelementptr <3 x float>* %tmp5, i32 %tmp4 ; <<3 x float>*> [#uses=1]
|
||||
%tmp7 = load <3 x float>* %arrayidx6 ; <<3 x float>> [#uses=1]
|
||||
%tmp8 = load <3 x float>* %v ; <<3 x float>> [#uses=1]
|
||||
%mul = mul <3 x float> %tmp7, %tmp8 ; <<3 x float>> [#uses=1]
|
||||
%add = add <3 x float> %mul, < float 0x409EE02900000000, float 0x409EE02900000000, float 0x409EE02900000000 > ; <<3 x float>> [#uses=1]
|
||||
store <3 x float> %add, <3 x float>* %arrayidx
|
||||
br label %forinc
|
||||
|
||||
forinc: ; preds = %forbody
|
||||
%tmp9 = load i32* %i ; <i32> [#uses=1]
|
||||
%inc = add i32 %tmp9, 1 ; <i32> [#uses=1]
|
||||
store i32 %inc, i32* %i
|
||||
br label %forcond
|
||||
|
||||
afterfor: ; preds = %forcond
|
||||
ret void
|
||||
}
|
||||
44
test/CodeGen/X86/widen_cast-1.ll
Normal file
44
test/CodeGen/X86/widen_cast-1.ll
Normal file
@ -0,0 +1,44 @@
|
||||
; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t -f
|
||||
; RUN: grep paddw %t | count 1
|
||||
; RUN: grep movd %t | count 1
|
||||
; RUN: grep pextrd %t | count 1
|
||||
|
||||
; bitcast a v4i16 to v2i32
|
||||
|
||||
define void @convert(<2 x i32>* %dst, <4 x i16>* %src) nounwind {
|
||||
entry:
|
||||
%dst.addr = alloca <2 x i32>* ; <<2 x i32>**> [#uses=2]
|
||||
%src.addr = alloca <4 x i16>* ; <<4 x i16>**> [#uses=2]
|
||||
%i = alloca i32, align 4 ; <i32*> [#uses=6]
|
||||
store <2 x i32>* %dst, <2 x i32>** %dst.addr
|
||||
store <4 x i16>* %src, <4 x i16>** %src.addr
|
||||
store i32 0, i32* %i
|
||||
br label %forcond
|
||||
|
||||
forcond: ; preds = %forinc, %entry
|
||||
%tmp = load i32* %i ; <i32> [#uses=1]
|
||||
%cmp = icmp slt i32 %tmp, 4 ; <i1> [#uses=1]
|
||||
br i1 %cmp, label %forbody, label %afterfor
|
||||
|
||||
forbody: ; preds = %forcond
|
||||
%tmp1 = load i32* %i ; <i32> [#uses=1]
|
||||
%tmp2 = load <2 x i32>** %dst.addr ; <<2 x i32>*> [#uses=1]
|
||||
%arrayidx = getelementptr <2 x i32>* %tmp2, i32 %tmp1 ; <<2 x i32>*> [#uses=1]
|
||||
%tmp3 = load i32* %i ; <i32> [#uses=1]
|
||||
%tmp4 = load <4 x i16>** %src.addr ; <<4 x i16>*> [#uses=1]
|
||||
%arrayidx5 = getelementptr <4 x i16>* %tmp4, i32 %tmp3 ; <<4 x i16>*> [#uses=1]
|
||||
%tmp6 = load <4 x i16>* %arrayidx5 ; <<4 x i16>> [#uses=1]
|
||||
%add = add <4 x i16> %tmp6, < i16 1, i16 1, i16 1, i16 1 > ; <<4 x i16>> [#uses=1]
|
||||
%conv = bitcast <4 x i16> %add to <2 x i32> ; <<2 x i32>> [#uses=1]
|
||||
store <2 x i32> %conv, <2 x i32>* %arrayidx
|
||||
br label %forinc
|
||||
|
||||
forinc: ; preds = %forbody
|
||||
%tmp7 = load i32* %i ; <i32> [#uses=1]
|
||||
%inc = add i32 %tmp7, 1 ; <i32> [#uses=1]
|
||||
store i32 %inc, i32* %i
|
||||
br label %forcond
|
||||
|
||||
afterfor: ; preds = %forcond
|
||||
ret void
|
||||
}
|
||||
43
test/CodeGen/X86/widen_cast-2.ll
Normal file
43
test/CodeGen/X86/widen_cast-2.ll
Normal file
@ -0,0 +1,43 @@
|
||||
; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t -f
|
||||
; RUN: grep pextrd %t | count 5
|
||||
; RUN: grep movd %t | count 3
|
||||
|
||||
; bitcast v14i16 to v7i32
|
||||
|
||||
define void @convert(<7 x i32>* %dst, <14 x i16>* %src) nounwind {
|
||||
entry:
|
||||
%dst.addr = alloca <7 x i32>* ; <<7 x i32>**> [#uses=2]
|
||||
%src.addr = alloca <14 x i16>* ; <<14 x i16>**> [#uses=2]
|
||||
%i = alloca i32, align 4 ; <i32*> [#uses=6]
|
||||
store <7 x i32>* %dst, <7 x i32>** %dst.addr
|
||||
store <14 x i16>* %src, <14 x i16>** %src.addr
|
||||
store i32 0, i32* %i
|
||||
br label %forcond
|
||||
|
||||
forcond: ; preds = %forinc, %entry
|
||||
%tmp = load i32* %i ; <i32> [#uses=1]
|
||||
%cmp = icmp slt i32 %tmp, 4 ; <i1> [#uses=1]
|
||||
br i1 %cmp, label %forbody, label %afterfor
|
||||
|
||||
forbody: ; preds = %forcond
|
||||
%tmp1 = load i32* %i ; <i32> [#uses=1]
|
||||
%tmp2 = load <7 x i32>** %dst.addr ; <<2 x i32>*> [#uses=1]
|
||||
%arrayidx = getelementptr <7 x i32>* %tmp2, i32 %tmp1 ; <<7 x i32>*> [#uses=1]
|
||||
%tmp3 = load i32* %i ; <i32> [#uses=1]
|
||||
%tmp4 = load <14 x i16>** %src.addr ; <<4 x i16>*> [#uses=1]
|
||||
%arrayidx5 = getelementptr <14 x i16>* %tmp4, i32 %tmp3 ; <<4 x i16>*> [#uses=1]
|
||||
%tmp6 = load <14 x i16>* %arrayidx5 ; <<4 x i16>> [#uses=1]
|
||||
%add = add <14 x i16> %tmp6, < i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1 > ; <<4 x i16>> [#uses=1]
|
||||
%conv = bitcast <14 x i16> %add to <7 x i32> ; <<7 x i32>> [#uses=1]
|
||||
store <7 x i32> %conv, <7 x i32>* %arrayidx
|
||||
br label %forinc
|
||||
|
||||
forinc: ; preds = %forbody
|
||||
%tmp7 = load i32* %i ; <i32> [#uses=1]
|
||||
%inc = add i32 %tmp7, 1 ; <i32> [#uses=1]
|
||||
store i32 %inc, i32* %i
|
||||
br label %forcond
|
||||
|
||||
afterfor: ; preds = %forcond
|
||||
ret void
|
||||
}
|
||||
16
test/CodeGen/X86/widen_cast-3.ll
Normal file
16
test/CodeGen/X86/widen_cast-3.ll
Normal file
@ -0,0 +1,16 @@
|
||||
; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t -f
|
||||
; RUN: grep paddd %t | count 1
|
||||
; RUN: grep pextrd %t | count 2
|
||||
|
||||
; bitcast v12i8 to v3i32
|
||||
|
||||
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
|
||||
target triple = "i686-apple-darwin10.0.0d2"
|
||||
|
||||
define void @convert(<12 x i8>* %dst.addr, <3 x i32> %src) nounwind {
|
||||
entry:
|
||||
%add = add <3 x i32> %src, < i32 1, i32 1, i32 1 > ; <<3 x i32>> [#uses=1]
|
||||
%conv = bitcast <3 x i32> %add to <12 x i8> ; <<12 x i8>> [#uses=1]
|
||||
store <12 x i8> %conv, <12 x i8>* %dst.addr
|
||||
ret void
|
||||
}
|
||||
60
test/CodeGen/X86/widen_cast-4.ll
Normal file
60
test/CodeGen/X86/widen_cast-4.ll
Normal file
@ -0,0 +1,60 @@
|
||||
; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t -f
|
||||
; RUN: grep sarb %t | count 16
|
||||
|
||||
; v8i8 that is widen to v16i8 then split
|
||||
; FIXME: This is widen to v16i8 and split to 16 and we then rebuild the vector.
|
||||
; Unfortunately, we don't split the store so we don't get the code we want.
|
||||
|
||||
define void @update(i64* %dst_i, i64* %src_i, i32 %n) nounwind {
|
||||
entry:
|
||||
%dst_i.addr = alloca i64* ; <i64**> [#uses=2]
|
||||
%src_i.addr = alloca i64* ; <i64**> [#uses=2]
|
||||
%n.addr = alloca i32 ; <i32*> [#uses=2]
|
||||
%i = alloca i32, align 4 ; <i32*> [#uses=8]
|
||||
%dst = alloca <8 x i8>*, align 4 ; <<8 x i8>**> [#uses=2]
|
||||
%src = alloca <8 x i8>*, align 4 ; <<8 x i8>**> [#uses=2]
|
||||
store i64* %dst_i, i64** %dst_i.addr
|
||||
store i64* %src_i, i64** %src_i.addr
|
||||
store i32 %n, i32* %n.addr
|
||||
store i32 0, i32* %i
|
||||
br label %forcond
|
||||
|
||||
forcond: ; preds = %forinc, %entry
|
||||
%tmp = load i32* %i ; <i32> [#uses=1]
|
||||
%tmp1 = load i32* %n.addr ; <i32> [#uses=1]
|
||||
%cmp = icmp slt i32 %tmp, %tmp1 ; <i1> [#uses=1]
|
||||
br i1 %cmp, label %forbody, label %afterfor
|
||||
|
||||
forbody: ; preds = %forcond
|
||||
%tmp2 = load i32* %i ; <i32> [#uses=1]
|
||||
%tmp3 = load i64** %dst_i.addr ; <i64*> [#uses=1]
|
||||
%arrayidx = getelementptr i64* %tmp3, i32 %tmp2 ; <i64*> [#uses=1]
|
||||
%conv = bitcast i64* %arrayidx to <8 x i8>* ; <<8 x i8>*> [#uses=1]
|
||||
store <8 x i8>* %conv, <8 x i8>** %dst
|
||||
%tmp4 = load i32* %i ; <i32> [#uses=1]
|
||||
%tmp5 = load i64** %src_i.addr ; <i64*> [#uses=1]
|
||||
%arrayidx6 = getelementptr i64* %tmp5, i32 %tmp4 ; <i64*> [#uses=1]
|
||||
%conv7 = bitcast i64* %arrayidx6 to <8 x i8>* ; <<8 x i8>*> [#uses=1]
|
||||
store <8 x i8>* %conv7, <8 x i8>** %src
|
||||
%tmp8 = load i32* %i ; <i32> [#uses=1]
|
||||
%tmp9 = load <8 x i8>** %dst ; <<8 x i8>*> [#uses=1]
|
||||
%arrayidx10 = getelementptr <8 x i8>* %tmp9, i32 %tmp8 ; <<8 x i8>*> [#uses=1]
|
||||
%tmp11 = load i32* %i ; <i32> [#uses=1]
|
||||
%tmp12 = load <8 x i8>** %src ; <<8 x i8>*> [#uses=1]
|
||||
%arrayidx13 = getelementptr <8 x i8>* %tmp12, i32 %tmp11 ; <<8 x i8>*> [#uses=1]
|
||||
%tmp14 = load <8 x i8>* %arrayidx13 ; <<8 x i8>> [#uses=1]
|
||||
%add = add <8 x i8> %tmp14, < i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1 > ; <<8 x i8>> [#uses=1]
|
||||
%shr = ashr <8 x i8> %add, < i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2 > ; <<8 x i8>> [#uses=1]
|
||||
store <8 x i8> %shr, <8 x i8>* %arrayidx10
|
||||
br label %forinc
|
||||
|
||||
forinc: ; preds = %forbody
|
||||
%tmp15 = load i32* %i ; <i32> [#uses=1]
|
||||
%inc = add i32 %tmp15, 1 ; <i32> [#uses=1]
|
||||
store i32 %inc, i32* %i
|
||||
br label %forcond
|
||||
|
||||
afterfor: ; preds = %forcond
|
||||
ret void
|
||||
}
|
||||
|
||||
11
test/CodeGen/X86/widen_cast-5.ll
Normal file
11
test/CodeGen/X86/widen_cast-5.ll
Normal file
@ -0,0 +1,11 @@
|
||||
; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t -f
|
||||
|
||||
; bitcast a i64 to v2i32
|
||||
|
||||
define void @convert(<2 x i32>* %dst.addr, i64 %src) nounwind {
|
||||
entry:
|
||||
%conv = bitcast i64 %src to <2 x i32>
|
||||
%xor = xor <2 x i32> %conv, < i32 255, i32 32767 >
|
||||
store <2 x i32> %xor, <2 x i32>* %dst.addr
|
||||
ret void
|
||||
}
|
||||
13
test/CodeGen/X86/widen_conv-1.ll
Normal file
13
test/CodeGen/X86/widen_conv-1.ll
Normal file
@ -0,0 +1,13 @@
|
||||
; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t -f
|
||||
; RUN: grep pshufd %t | count 1
|
||||
; RUN: grep paddd %t | count 1
|
||||
|
||||
; truncate v2i64 to v2i32
|
||||
|
||||
define void @convert(<2 x i32>* %dst.addr, <2 x i64> %src) nounwind {
|
||||
entry:
|
||||
%val = trunc <2 x i64> %src to <2 x i32>
|
||||
%add = add <2 x i32> %val, < i32 1, i32 1 >
|
||||
store <2 x i32> %add, <2 x i32>* %dst.addr
|
||||
ret void
|
||||
}
|
||||
10
test/CodeGen/X86/widen_conv-2.ll
Normal file
10
test/CodeGen/X86/widen_conv-2.ll
Normal file
@ -0,0 +1,10 @@
|
||||
; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t -f
|
||||
|
||||
; sign extension v2i32 to v2i16
|
||||
|
||||
define void @convert(<2 x i32>* %dst.addr, <2 x i16> %src) nounwind {
|
||||
entry:
|
||||
%signext = sext <2 x i16> %src to <2 x i32> ; <<12 x i8>> [#uses=1]
|
||||
store <2 x i32> %signext, <2 x i32>* %dst.addr
|
||||
ret void
|
||||
}
|
||||
10
test/CodeGen/X86/widen_conv-3.ll
Normal file
10
test/CodeGen/X86/widen_conv-3.ll
Normal file
@ -0,0 +1,10 @@
|
||||
; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t -f
|
||||
; grep cvtsi2ss %t | count 1
|
||||
; sign to float v2i16 to v2f32
|
||||
|
||||
define void @convert(<2 x float>* %dst.addr, <2 x i16> %src) nounwind {
|
||||
entry:
|
||||
%val = sitofp <2 x i16> %src to <2 x float>
|
||||
store <2 x float> %val, <2 x float>* %dst.addr
|
||||
ret void
|
||||
}
|
||||
10
test/CodeGen/X86/widen_conv-4.ll
Normal file
10
test/CodeGen/X86/widen_conv-4.ll
Normal file
@ -0,0 +1,10 @@
|
||||
; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t -f
|
||||
|
||||
; unsigned to float v7i16 to v7f32
|
||||
|
||||
define void @convert(<7 x float>* %dst.addr, <7 x i16> %src) nounwind {
|
||||
entry:
|
||||
%val = sitofp <7 x i16> %src to <7 x float>
|
||||
store <7 x float> %val, <7 x float>* %dst.addr
|
||||
ret void
|
||||
}
|
||||
11
test/CodeGen/X86/widen_select-1.ll
Normal file
11
test/CodeGen/X86/widen_select-1.ll
Normal file
@ -0,0 +1,11 @@
|
||||
; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t -f
|
||||
|
||||
; widening select v6i32 and then a sub
|
||||
|
||||
define void @select(i1 %c, <6 x i32>* %dst.addr, <6 x i32> %src1,<6 x i32> %src2) nounwind {
|
||||
entry:
|
||||
%x = select i1 %c, <6 x i32> %src1, <6 x i32> %src2
|
||||
%val = sub <6 x i32> %x, < i32 1, i32 1, i32 1, i32 1, i32 1, i32 1 >;
|
||||
store <6 x i32> %val, <6 x i32>* %dst.addr
|
||||
ret void
|
||||
}
|
||||
11
test/CodeGen/X86/widen_shuffle-1.ll
Normal file
11
test/CodeGen/X86/widen_shuffle-1.ll
Normal file
@ -0,0 +1,11 @@
|
||||
; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t -f
|
||||
|
||||
; widening shuffle v3float and then a add
|
||||
|
||||
define void @shuf(<3 x float>* %dst.addr, <3 x float> %src1,<3 x float> %src2) nounwind {
|
||||
entry:
|
||||
%x = shufflevector <3 x float> %src1, <3 x float> %src2, <3 x i32> < i32 0, i32 1, i32 2>
|
||||
%val = add <3 x float> %x, %src2;
|
||||
store <3 x float> %val, <3 x float>* %dst.addr
|
||||
ret void
|
||||
}
|
||||
11
test/CodeGen/X86/widen_shuffle-2.ll
Normal file
11
test/CodeGen/X86/widen_shuffle-2.ll
Normal file
@ -0,0 +1,11 @@
|
||||
; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t -f
|
||||
|
||||
; widening shuffle v3float and then a add
|
||||
|
||||
define void @shuf(<3 x float>* %dst.addr, <3 x float> %src1,<3 x float> %src2) nounwind {
|
||||
entry:
|
||||
%x = shufflevector <3 x float> %src1, <3 x float> %src2, <3 x i32> < i32 0, i32 4, i32 2>
|
||||
%val = add <3 x float> %x, %src2;
|
||||
store <3 x float> %val, <3 x float>* %dst.addr
|
||||
ret void
|
||||
}
|
||||
Loading…
Reference in New Issue
Block a user